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[X3] Fixes
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794a63778e
commit
82428404e2
12 changed files with 38 additions and 2 deletions
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@ -553,6 +553,9 @@ enum MixSources {
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MIXSRC_POT1 = MIXSRC_FIRST_POT, LUA_EXPORT("s1", "Potentiometer 1")
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MIXSRC_POT2, LUA_EXPORT("s2", "Potentiometer 2")
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MIXSRC_LAST_POT = MIXSRC_POT2,
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#elif defined(PCBX3)
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MIXSRC_POT1 = MIXSRC_FIRST_POT, LUA_EXPORT("s1", "Potentiometer 1")
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MIXSRC_LAST_POT = MIXSRC_POT1,
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#elif defined(PCBTARANIS)
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MIXSRC_POT1 = MIXSRC_FIRST_POT, LUA_EXPORT("s1", "Potentiometer 1")
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MIXSRC_POT2, LUA_EXPORT("s2", "Potentiometer 2")
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@ -417,6 +417,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -432,6 +432,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -421,6 +421,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -538,10 +541,10 @@
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#endif
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#if defined(PCBTARANIS)
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#define TR_POPUPS_ENTER_EXIT TR(TR_EXIT "\010" TR_ENTER, TR_EXIT "\010" "\010" "\010" "\010" TR_ENTER)
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#define TR_POPUPS_ENTER_EXIT TR(TR_EXIT "\010" TR_ENTER, TR_EXIT "\010" "\010" "\010" "\010" TR_ENTER)
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#define TR_OK TR("\010" "\010" "\010" "[OK]", "\010" "\010" "\010" "\010" "\010" "[OK]")
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#else
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#define TR_POPUPS_ENTER_EXIT TR_ENTER "\010" TR_EXIT
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#define TR_POPUPS_ENTER_EXIT TR_ENTER "\010" TR_EXIT
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#define OFS_EXIT sizeof(TR_ENTER)
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#endif
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@ -421,6 +421,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -421,6 +421,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -434,6 +434,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -423,6 +423,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -416,6 +416,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -424,6 +424,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -420,6 +420,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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@ -430,6 +430,9 @@
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#elif defined(PCBX7)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0"
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#elif defined(PCBX3)
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#define TR_POTS_VSRCRAW "\310S1\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0"
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#elif defined(PCBTARANIS)
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#define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0"
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#define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"
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