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Cosmetics

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Bertrand Songis 2025-01-21 08:37:55 +01:00
parent 942fdcb54d
commit 8c5bf752bc
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1 changed files with 8 additions and 8 deletions
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16
radio/src/targets/taranis/hal.h
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@ -1030,11 +1030,11 @@
#define ADC_TRANSFER_COMPLETE() (ADC_DMA->HISR & DMA_HISR_TCIF4) #define ADC_TRANSFER_COMPLETE() (ADC_DMA->HISR & DMA_HISR_TCIF4)
#define ADC_SAMPTIME 2 // sample time = 28 cycles #define ADC_SAMPTIME 2 // sample time = 28 cycles
#if defined(RADIO_TLITE) #if defined(RADIO_TLITE)
#define ADC_MAIN_SMPR1 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + ((ADC_SAMPTIME + 1) << 24); // TLite needs +1 for proper RTC Bat measurement. #define ADC_MAIN_SMPR1 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + ((ADC_SAMPTIME + 1) << 24) // TLite needs +1 for proper RTC Bat measurement.
#define ADC_MAIN_SMPR2 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24) + (ADC_SAMPTIME << 27); #define ADC_MAIN_SMPR2 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24) + (ADC_SAMPTIME << 27)
#else #else
#define ADC_MAIN_SMPR1 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24); #define ADC_MAIN_SMPR1 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24)
#define ADC_MAIN_SMPR2 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24) + (ADC_SAMPTIME << 27); #define ADC_MAIN_SMPR2 (ADC_SAMPTIME << 0) + (ADC_SAMPTIME << 3) + (ADC_SAMPTIME << 6) + (ADC_SAMPTIME << 9) + (ADC_SAMPTIME << 12) + (ADC_SAMPTIME << 15) + (ADC_SAMPTIME << 18) + (ADC_SAMPTIME << 21) + (ADC_SAMPTIME << 24) + (ADC_SAMPTIME << 27)
#endif #endif
#if defined(PCBX9E) #if defined(PCBX9E)
#define HARDWARE_POT1 #define HARDWARE_POT1
@ -1234,10 +1234,10 @@
#define ADC_GPIOA_PINS (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_5) #define ADC_GPIOA_PINS (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_5)
#define ADC_GPIOB_PINS (GPIO_Pin_0 | GPIO_Pin_1) #define ADC_GPIOB_PINS (GPIO_Pin_0 | GPIO_Pin_1)
#define ADC_GPIOC_PINS (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3) #define ADC_GPIOC_PINS (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3)
#define ADC_CHANNEL_SLIDER1 ADC_Channel_10 #define ADC_CHANNEL_SLIDER1 ADC_Channel_10 // ADC1_IN10
#define ADC_CHANNEL_SLIDER2 ADC_Channel_11 #define ADC_CHANNEL_SLIDER2 ADC_Channel_11 // ADC1_IN11
#define ADC_CHANNEL_POT1 ADC_Channel_12 #define ADC_CHANNEL_POT1 ADC_Channel_12 // ADC1_IN12
#define ADC_CHANNEL_POT2 ADC_Channel_13 #define ADC_CHANNEL_POT2 ADC_Channel_13 // ADC1_IN13
#define ADC_CHANNEL_EXT1 ADC_Channel_8 #define ADC_CHANNEL_EXT1 ADC_Channel_8
#define ADC_CHANNEL_EXT2 ADC_Channel_9 #define ADC_CHANNEL_EXT2 ADC_Channel_9
#define ADC_CHANNEL_BATT ADC_Channel_5 #define ADC_CHANNEL_BATT ADC_Channel_5