mirror of
https://github.com/opentx/opentx.git
synced 2025-07-23 08:15:17 +03:00
Refactoring
This commit is contained in:
bsongis
parent
9ef6e139f7
commit
8d30efddc5
47 changed files with 6372 additions and 335 deletions
28
src/Makefile
28
src/Makefile
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@ -126,13 +126,12 @@ COPY = cp
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WINSHELL = cmd
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WINSHELL = cmd
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IMG2LBM = python ../util/img2lbm.py
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IMG2LBM = python ../util/img2lbm.py
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AREV = $(shell sh -c "cat .svn/entries | sed -n '4p'")
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REV = $(shell sh -c "svnversion | egrep -o '[[:digit:]]+[[:alpha:]]*$$'")
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REV = $(shell echo $$(( $(AREV) + 1 )))
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# MCU name
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# MCU name
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ifeq ($(PCB), ARM)
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ifeq ($(PCB), ARM)
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MCU = cortex-m3
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MCU = cortex-m3
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BOARDSRC = board_arm.cpp
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BOARDSRC = board_arm.cpp
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endif
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endif
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ifeq ($(PCB), STD)
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ifeq ($(PCB), STD)
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MCU = atmega64
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MCU = atmega64
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@ -156,7 +155,7 @@ TARGET = open9x
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OBJDIR = obj
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OBJDIR = obj
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# List C++ source files here. (C dependencies are automatically generated.)
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# List C++ source files here. (C dependencies are automatically generated.)
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CPPSRC = open9x.cpp pulses.cpp stamp.cpp menus.cpp model_menus.cpp general_menus.cpp main_views.cpp statistics_views.cpp pers.cpp file.cpp lcd.cpp drivers.cpp o9xstrings.cpp
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CPPSRC = open9x.cpp pulses.cpp stamp.cpp menus.cpp model_menus.cpp general_menus.cpp main_views.cpp statistics_views.cpp eeprom_avr.cpp lcd.cpp drivers.cpp o9xstrings.cpp
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ifeq ($(EXT), JETI)
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ifeq ($(EXT), JETI)
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CPPSRC += jeti.cpp
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CPPSRC += jeti.cpp
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@ -172,10 +171,10 @@ endif
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# Disk IO support (PCB V2+ only)
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# Disk IO support (PCB V2+ only)
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ifneq ($(PCB), STD)
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ifneq ($(PCB), STD)
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CPPSRC += gtime.cpp
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CPPSRC += gruvin9x/gtime.cpp
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CPPSRC += rtc.cpp
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CPPSRC += gruvin9x/rtc.cpp
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CPPSRC += ff.cpp
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CPPSRC += gruvin9x/ff.cpp
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CPPSRC += diskio.cpp
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CPPSRC += gruvin9x/diskio.cpp
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endif
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endif
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# List Assembler source files here.
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# List Assembler source files here.
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@ -205,7 +204,7 @@ DBGFMT = dwarf-2
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# Each directory must be seperated by a space.
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# Each directory must be seperated by a space.
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# Use forward slashes for directory separators.
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# Use forward slashes for directory separators.
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# For a directory that has spaces, enclose it in quotes.
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# For a directory that has spaces, enclose it in quotes.
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EXTRAINCDIRS = translations
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EXTRAINCDIRS = . translations
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# Compiler flag to set the C Standard level.
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# Compiler flag to set the C Standard level.
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@ -297,6 +296,7 @@ endif
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ifeq ($(PCB), V4)
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ifeq ($(PCB), V4)
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# V4 PCB, so ...
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# V4 PCB, so ...
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CPPDEFS += -DPCBV4 -DAUDIO
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CPPDEFS += -DPCBV4 -DAUDIO
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EXTRAINCDIRS += gruvin9x
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CPPSRC += audio.cpp
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CPPSRC += audio.cpp
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ifeq ($(NAVIGATION), RE1)
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ifeq ($(NAVIGATION), RE1)
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@ -304,13 +304,13 @@ ifeq ($(PCB), V4)
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endif
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endif
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ifeq ($(LOGS), YES)
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ifeq ($(LOGS), YES)
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CPPSRC += logs.cpp
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CPPSRC += gruvin9x/logs.cpp
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CPPDEFS += -DLOGS
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CPPDEFS += -DLOGS
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MODS:=${MODS}L
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MODS:=${MODS}L
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endif
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endif
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ifeq ($(SOMO), YES)
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ifeq ($(SOMO), YES)
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CPPSRC += somo14d.cpp
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CPPSRC += gruvin9x/somo14d.cpp
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CPPDEFS += -DSOMO
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CPPDEFS += -DSOMO
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endif
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endif
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else
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else
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@ -691,8 +691,8 @@ FOXLIB=-L/usr/local/lib \
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-lFOX-1.6 \
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-lFOX-1.6 \
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-Wl,-rpath,$(FOXPATH)/src/.libs
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-Wl,-rpath,$(FOXPATH)/src/.libs
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simu: $(CPPSRC) Makefile simu.cpp $(CPPSRC) simpgmspace.cpp *.h *.lbm eeprom.bin
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simu: $(BOARDSRC) $(CPPSRC) Makefile simu.cpp simpgmspace.cpp *.h *.lbm eeprom.bin
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g++ simu.cpp $(CPPFLAGS) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread
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g++ simu.cpp $(BOARDSRC) $(CPPFLAGS) $(CPPSRC) simpgmspace.cpp $(ARCH) -MD -DSIMU -o simu $(FOXINC) $(FOXLIB) -pthread
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eeprom.bin:
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eeprom.bin:
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dd if=/dev/zero of=$@ bs=1 count=2048
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dd if=/dev/zero of=$@ bs=1 count=2048
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@ -68,7 +68,7 @@ extern void beep(uint8_t val);
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#define IS_AUDIO_BUSY() (g_beepCnt || beepAgain || beepOn)
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#define IS_AUDIO_BUSY() (g_beepCnt || beepAgain || beepOn)
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#if not defined(PCBARM)
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#if !defined(PCBARM)
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FORCEINLINE void AUDIO_HEARTBEAT()
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FORCEINLINE void AUDIO_HEARTBEAT()
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{
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{
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if(g_beepCnt) {
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if(g_beepCnt) {
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@ -69,7 +69,10 @@ inline void board_init()
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}
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}
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#endif
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#endif
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FORCEINLINE uint8_t keyDown()
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#ifndef SIMU
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FORCEINLINE
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#endif
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uint8_t keyDown()
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{
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{
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return (~PINL) & 0x3F;
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return (~PINL) & 0x3F;
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}
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}
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@ -128,7 +131,9 @@ bool keyState(EnumKeys enuk)
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return result;
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return result;
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}
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}
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#ifndef SIMU
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FORCEINLINE
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#endif
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void readKeysAndTrims()
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void readKeysAndTrims()
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{
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{
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/* Original keys were connected to PORTB as follows:
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/* Original keys were connected to PORTB as follows:
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@ -68,7 +68,10 @@ inline void board_init()
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}
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}
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#endif
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#endif
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FORCEINLINE uint8_t keyDown()
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#ifndef SIMU
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FORCEINLINE
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#endif
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uint8_t keyDown()
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{
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{
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return (~PINB) & 0x7E;
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return (~PINB) & 0x7E;
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}
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}
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@ -142,7 +145,10 @@ bool keyState(EnumKeys enuk)
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return result;
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return result;
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}
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}
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inline void readKeysAndTrims()
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#ifndef SIMU
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FORCEINLINE
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#endif
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void readKeysAndTrims()
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{
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{
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uint8_t enuk = KEY_MENU;
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uint8_t enuk = KEY_MENU;
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@ -33,66 +33,6 @@
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#include "open9x.h"
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#include "open9x.h"
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uint16_t eeprom_pointer;
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const char* eeprom_buffer_data;
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volatile int8_t eeprom_buffer_size = 0;
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#if not defined(SIMU) and not defined(PCBARM)
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inline void eeprom_write_byte()
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{
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EEAR = eeprom_pointer;
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EEDR = *eeprom_buffer_data;
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#if defined (PCBV4)
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EECR |= 1<<EEMPE;
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EECR |= 1<<EEPE;
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#else
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EECR |= 1<<EEMWE;
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EECR |= 1<<EEWE;
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#endif
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eeprom_pointer++;
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eeprom_buffer_data++;
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}
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ISR(EE_READY_vect)
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{
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if (--eeprom_buffer_size > 0) {
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eeprom_write_byte();
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}
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else {
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#if defined (PCBV4)
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EECR &= ~(1<<EERIE);
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#else
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EECR &= ~(1<<EERIE);
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#endif
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}
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}
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#endif
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void eeWriteBlockCmp(const void *i_pointer_ram, uint16_t i_pointer_eeprom, size_t size)
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{
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assert(!eeprom_buffer_size);
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eeprom_pointer = i_pointer_eeprom;
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eeprom_buffer_data = (const char*)i_pointer_ram;
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eeprom_buffer_size = size+1;
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#ifdef SIMU
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sem_post(&eeprom_write_sem);
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#elif defined (PCBARM)
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#elif defined (PCBV4)
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EECR |= (1<<EERIE);
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#else
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EECR |= (1<<EERIE);
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#endif
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if (s_sync_write) {
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while (eeprom_buffer_size > 0) wdt_reset();
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}
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}
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static uint8_t s_evt;
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static uint8_t s_evt;
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void putEvent(uint8_t evt)
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void putEvent(uint8_t evt)
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{
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{
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@ -251,7 +191,7 @@ void per10ms()
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if(mixWarning & 2) if(((g_tmr10ms&0xFF)== 64) || ((g_tmr10ms&0xFF)== 72)) AUDIO_MIX_WARNING_2();
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if(mixWarning & 2) if(((g_tmr10ms&0xFF)== 64) || ((g_tmr10ms&0xFF)== 72)) AUDIO_MIX_WARNING_2();
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if(mixWarning & 4) if(((g_tmr10ms&0xFF)==128) || ((g_tmr10ms&0xFF)==136) || ((g_tmr10ms&0xFF)==144)) AUDIO_MIX_WARNING_3();
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if(mixWarning & 4) if(((g_tmr10ms&0xFF)==128) || ((g_tmr10ms&0xFF)==136) || ((g_tmr10ms&0xFF)==144)) AUDIO_MIX_WARNING_3();
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#if defined(FRSKY_HUB) or defined(WS_HOW_HIGH)
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#if defined(FRSKY_HUB) || defined(WS_HOW_HIGH)
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static uint16_t s_varioTmr = 0;
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static uint16_t s_varioTmr = 0;
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if (isFunctionActive(FUNC_VARIO)) {
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if (isFunctionActive(FUNC_VARIO)) {
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1462
src/eeprom_arm.cpp
Normal file
1462
src/eeprom_arm.cpp
Normal file
File diff suppressed because it is too large
Load diff
115
src/eeprom_arm.h
Normal file
115
src/eeprom_arm.h
Normal file
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@ -0,0 +1,115 @@
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/*
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* Author - Erez Raviv <erezraviv@gmail.com>
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*
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* Based on th9x -> http://code.google.com/p/th9x/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef eeprom_arm_h
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#define eeprom_arm_h
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#include <inttypes.h>
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#include <stdint.h>
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extern void init_eeprom( void ) ;
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extern uint32_t ee32_check_finished( void ) ;
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extern void ee32StoreGeneral( void ) ;
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extern void ee32StoreModel( uint8_t modelNumber, uint8_t trim ) ;
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extern bool ee32LoadGeneral( void ) ;
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extern void ee32LoadModel(uint8_t id) ;
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extern void ee32WaitLoadModel(uint8_t id) ;
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extern void ee32_delete_model( uint8_t id ) ;
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extern bool ee32ModelExists(uint8_t id) ;
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extern uint32_t ee32_process( void ) ;
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#define DISPLAY_PROGRESS_BAR(x)
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struct t_file_entry
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{
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uint32_t block_no ;
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uint32_t sequence_no ;
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uint16_t size ;
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uint8_t flags ;
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} ;
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extern struct t_file_entry File_system[] ;
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extern unsigned char ModelNames[][sizeof(g_model.name)] ; // Allow for general
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extern EEGeneral g_eeGeneral;
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extern ModelData g_model;
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extern uint8_t Spi_tx_buf[] ;
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extern uint8_t Spi_rx_buf[] ;
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/// fileId of general file
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//#define FILE_GENERAL 0
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/// convert model number 0..MAX_MODELS-1 int fileId
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//#define FILE_MODEL(n) (1+n)
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//#define FILE_TMP (1+16)
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//bool EeFsOpen();
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//int8_t EeFsck();
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//void EeFsFormat();
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//uint16_t EeFsGetFree();
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//#define ERR_NONE 0
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//#define ERR_FULL 1
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//#define ERR_TMO 2
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//class EFile
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//{
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// uint8_t m_fileId; //index of file in directory = filename
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// uint16_t m_pos; //over all filepos
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// uint8_t m_currBlk; //current block.id
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// uint8_t m_ofs; //offset inside of the current block
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// uint8_t m_bRlc; //control byte for run length decoder
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// uint8_t m_err; //error reasons
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// uint16_t m_stopTime10ms; //maximum point of time for writing
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//public:
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///remove contents of given file
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// static void rm(uint8_t i_fileId);
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///swap contents of file1 with them of file2
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// static void swap(uint8_t i_fileId1,uint8_t i_fileId2);
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///return true if the file with given fileid exists
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// static bool exists(uint8_t i_fileId);
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///open file for reading, no close necessary
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///for writing use writeRlc() or create()
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// uint8_t openRd(uint8_t i_fileId);
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/// create a new file with given fileId,
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/// !!! if this file already exists, then all blocks are reused
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/// and all contents will be overwritten.
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/// after writing closeTrunc has to be called
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// void create(uint8_t i_fileId, uint8_t typ, uint16_t maxTme10ms);
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/// close file and truncate the blockchain if to long.
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// void closeTrunc();
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///open file, write to file and close it.
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///If file existed before, then contents is overwritten.
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///If file was larger before, then unused blocks are freed
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// uint16_t writeRlc(uint8_t i_fileId, uint8_t typ,uint8_t*buf,uint16_t i_len, uint8_t maxTme10ms);
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// uint8_t read(uint8_t*buf,uint16_t i_len);
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// uint8_t write(uint8_t*buf,uint8_t i_len);
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///return size of compressed file without block overhead
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// uint16_t size();
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///read from opened file and decode rlc-coded data
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// uint16_t readRlc(uint8_t*buf,uint16_t i_len);
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///deliver current errno, this is reset in open
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// uint8_t errno(){return m_err;}
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//};
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#endif
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/*eof*/
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@ -38,6 +38,9 @@
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uint8_t s_write_err = 0; // error reasons
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uint8_t s_write_err = 0; // error reasons
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uint8_t s_sync_write = false;
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uint8_t s_sync_write = false;
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||||||
|
uint8_t s_eeDirtyMsk;
|
||||||
|
|
||||||
|
RlcFile theFile; //used for any file operation
|
||||||
|
|
||||||
#define EEFS_VERS 4
|
#define EEFS_VERS 4
|
||||||
PACK(struct DirEnt{
|
PACK(struct DirEnt{
|
||||||
|
|
@ -54,6 +57,70 @@ PACK(struct EeFs{
|
||||||
DirEnt files[MAXFILES];
|
DirEnt files[MAXFILES];
|
||||||
}) eeFs;
|
}) eeFs;
|
||||||
|
|
||||||
|
void eeDirty(uint8_t msk)
|
||||||
|
{
|
||||||
|
s_eeDirtyMsk |= msk;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t eeprom_pointer;
|
||||||
|
const char* eeprom_buffer_data;
|
||||||
|
volatile int8_t eeprom_buffer_size = 0;
|
||||||
|
|
||||||
|
#if !defined(SIMU)
|
||||||
|
|
||||||
|
inline void eeprom_write_byte()
|
||||||
|
{
|
||||||
|
EEAR = eeprom_pointer;
|
||||||
|
EEDR = *eeprom_buffer_data;
|
||||||
|
#if defined (PCBV4)
|
||||||
|
EECR |= 1<<EEMPE;
|
||||||
|
EECR |= 1<<EEPE;
|
||||||
|
#else
|
||||||
|
EECR |= 1<<EEMWE;
|
||||||
|
EECR |= 1<<EEWE;
|
||||||
|
#endif
|
||||||
|
eeprom_pointer++;
|
||||||
|
eeprom_buffer_data++;
|
||||||
|
}
|
||||||
|
|
||||||
|
ISR(EE_READY_vect)
|
||||||
|
{
|
||||||
|
if (--eeprom_buffer_size > 0) {
|
||||||
|
eeprom_write_byte();
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
#if defined (PCBV4)
|
||||||
|
EECR &= ~(1<<EERIE);
|
||||||
|
#else
|
||||||
|
EECR &= ~(1<<EERIE);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void eeWriteBlockCmp(const void *i_pointer_ram, uint16_t i_pointer_eeprom, size_t size)
|
||||||
|
{
|
||||||
|
assert(!eeprom_buffer_size);
|
||||||
|
|
||||||
|
eeprom_pointer = i_pointer_eeprom;
|
||||||
|
eeprom_buffer_data = (const char*)i_pointer_ram;
|
||||||
|
eeprom_buffer_size = size+1;
|
||||||
|
|
||||||
|
#ifdef SIMU
|
||||||
|
sem_post(&eeprom_write_sem);
|
||||||
|
#elif defined (PCBARM)
|
||||||
|
|
||||||
|
#elif defined (PCBV4)
|
||||||
|
EECR |= (1<<EERIE);
|
||||||
|
#else
|
||||||
|
EECR |= (1<<EERIE);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (s_sync_write) {
|
||||||
|
while (eeprom_buffer_size > 0) wdt_reset();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static uint8_t EeFsRead(uint8_t blk, uint8_t ofs)
|
static uint8_t EeFsRead(uint8_t blk, uint8_t ofs)
|
||||||
{
|
{
|
||||||
|
|
@ -596,3 +663,117 @@ void RlcFile::DisplayProgressBar(uint8_t x)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
bool eeLoadGeneral()
|
||||||
|
{
|
||||||
|
theFile.openRlc(FILE_GENERAL);
|
||||||
|
if (theFile.readRlc((uint8_t*)&g_eeGeneral, 1) == 1 && g_eeGeneral.myVers == EEPROM_VER) {
|
||||||
|
theFile.openRlc(FILE_GENERAL); // TODO include this openRlc inside readRlc
|
||||||
|
if (theFile.readRlc((uint8_t*)&g_eeGeneral, sizeof(g_eeGeneral)) <= sizeof(EEGeneral)) {
|
||||||
|
uint16_t sum = evalChkSum();
|
||||||
|
if (g_eeGeneral.chkSum == sum) {
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
uint16_t eeLoadModelName(uint8_t id, char *name)
|
||||||
|
{
|
||||||
|
memset(name, 0, sizeof(g_model.name));
|
||||||
|
if (id<MAX_MODELS) {
|
||||||
|
theFile.openRlc(FILE_MODEL(id));
|
||||||
|
if (theFile.readRlc((uint8_t*)name, sizeof(g_model.name)) == sizeof(g_model.name)) {
|
||||||
|
return theFile.size();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool eeModelExists(uint8_t id)
|
||||||
|
{
|
||||||
|
return EFile::exists(FILE_MODEL(id));
|
||||||
|
}
|
||||||
|
|
||||||
|
void eeLoadModel(uint8_t id)
|
||||||
|
{
|
||||||
|
if(id<MAX_MODELS)
|
||||||
|
{
|
||||||
|
theFile.openRlc(FILE_MODEL(id));
|
||||||
|
uint16_t sz = theFile.readRlc((uint8_t*)&g_model, sizeof(g_model));
|
||||||
|
|
||||||
|
#ifdef SIMU
|
||||||
|
if (sz > 0 && sz != sizeof(g_model)) {
|
||||||
|
printf("Model data read=%d bytes vs %d bytes\n", sz, (int)sizeof(ModelData));
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
if (sz == 0) {
|
||||||
|
// alert("Error Loading Model");
|
||||||
|
modelDefault(id);
|
||||||
|
eeCheck(true);
|
||||||
|
}
|
||||||
|
|
||||||
|
resetProto();
|
||||||
|
resetAll();
|
||||||
|
|
||||||
|
#ifdef LOGS
|
||||||
|
initLogs();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
int8_t eeFindEmptyModel(uint8_t id, bool down)
|
||||||
|
{
|
||||||
|
int8_t i = id;
|
||||||
|
for (;;) {
|
||||||
|
i = (MAX_MODELS + (down ? i+1 : i-1)) % MAX_MODELS;
|
||||||
|
if (!EFile::exists(FILE_MODEL(i))) break;
|
||||||
|
if (i == id) return -1; // no free space in directory left
|
||||||
|
}
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
|
||||||
|
void eeReadAll()
|
||||||
|
{
|
||||||
|
if(!EeFsOpen() ||
|
||||||
|
EeFsck() < 0 ||
|
||||||
|
!eeLoadGeneral())
|
||||||
|
{
|
||||||
|
alert(STR_BADEEPROMDATA, true);
|
||||||
|
message(STR_EEPROMFORMATTING);
|
||||||
|
EeFsFormat();
|
||||||
|
//alert(PSTR("format ok"));
|
||||||
|
generalDefault();
|
||||||
|
//alert(PSTR("default ok"));
|
||||||
|
|
||||||
|
theFile.writeRlc(FILE_GENERAL, FILE_TYP_GENERAL,(uint8_t*)&g_eeGeneral,sizeof(EEGeneral), true);
|
||||||
|
|
||||||
|
modelDefault(0);
|
||||||
|
//alert(PSTR("modef ok"));
|
||||||
|
theFile.writeRlc(FILE_MODEL(0), FILE_TYP_MODEL, (uint8_t*)&g_model, sizeof(g_model), true);
|
||||||
|
//alert(PSTR("modwrite ok"));
|
||||||
|
}
|
||||||
|
|
||||||
|
stickMode = g_eeGeneral.stickMode;
|
||||||
|
eeLoadModel(g_eeGeneral.currModel);
|
||||||
|
}
|
||||||
|
|
||||||
|
void eeCheck(bool immediately)
|
||||||
|
{
|
||||||
|
if (immediately) {
|
||||||
|
eeFlush();
|
||||||
|
}
|
||||||
|
if (s_eeDirtyMsk & EE_GENERAL) {
|
||||||
|
s_eeDirtyMsk -= EE_GENERAL;
|
||||||
|
theFile.writeRlc(FILE_GENERAL, FILE_TYP_GENERAL, (uint8_t*)&g_eeGeneral, sizeof(EEGeneral), immediately);
|
||||||
|
if (!immediately) return;
|
||||||
|
}
|
||||||
|
if (s_eeDirtyMsk & EE_MODEL) {
|
||||||
|
s_eeDirtyMsk = 0;
|
||||||
|
theFile.writeRlc(FILE_MODEL(g_eeGeneral.currModel), FILE_TYP_MODEL, (uint8_t*)&g_model, sizeof(g_model), immediately);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
@ -167,6 +167,10 @@ public:
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
extern RlcFile theFile; //used for any file operation
|
||||||
|
|
||||||
|
inline void eeFlush() { theFile.flush(); }
|
||||||
|
|
||||||
#if defined (EEPROM_PROGRESS_BAR)
|
#if defined (EEPROM_PROGRESS_BAR)
|
||||||
#define DISPLAY_PROGRESS_BAR(x) theFile.DisplayProgressBar(x)
|
#define DISPLAY_PROGRESS_BAR(x) theFile.DisplayProgressBar(x)
|
||||||
#else
|
#else
|
||||||
667
src/ersky9x/board.h
Normal file
667
src/ersky9x/board.h
Normal file
|
|
@ -0,0 +1,667 @@
|
||||||
|
/* ----------------------------------------------------------------------------
|
||||||
|
* ATMEL Microcontroller Software Support
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
* Copyright (c) 2009, Atmel Corporation
|
||||||
|
*
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* - Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the disclaimer below.
|
||||||
|
*
|
||||||
|
* Atmel's name may not be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||||
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||||
|
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||||
|
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/**
|
||||||
|
* \page sam3s_ek_board_desc "SAM3S-EK - Board Description"
|
||||||
|
*
|
||||||
|
* \section
|
||||||
|
* A file is dedicated to descibe the AT91SAM3S-EK board.
|
||||||
|
*
|
||||||
|
* \section Contents
|
||||||
|
* - The code for booting the board is provided by board_cstartup.S and
|
||||||
|
* board_lowlevel.c.
|
||||||
|
* - For using board PIOs, board characteristics (clock, etc.) and external
|
||||||
|
* components, see board.h.
|
||||||
|
* - For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
|
||||||
|
*
|
||||||
|
* To get more software details and the full list of parameters related to the
|
||||||
|
* SAM3S-EK board configuration, please have a look at the source file: \n
|
||||||
|
* \ref board.h\n
|
||||||
|
*
|
||||||
|
* This file can be used as a template and modified to fit a custom board, with
|
||||||
|
* specific PIOs usage or memory connections.
|
||||||
|
**/
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \file board.h
|
||||||
|
///
|
||||||
|
/// \par Purpose
|
||||||
|
///
|
||||||
|
/// Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and
|
||||||
|
/// external components interfacing.
|
||||||
|
///
|
||||||
|
/// \par Usage
|
||||||
|
/// -# For operating frequency information, see "SAM3S-EK - Operating frequencies".
|
||||||
|
/// -# For using portable PIO definitions, see "SAM3S-EK - PIO definitions".
|
||||||
|
/// -# Several USB definitions are included here (see "SAM3S-EK - USB device").
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
#ifndef BOARD_H
|
||||||
|
#define BOARD_H
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
// Headers
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#if defined(at91sam3s4)
|
||||||
|
#include "chip.h"
|
||||||
|
#include "AT91SAM3S4.h"
|
||||||
|
#else
|
||||||
|
#error Board does not support the specified chip.
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
// Definitions
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par
|
||||||
|
/// This page lists several definition related to the board description.
|
||||||
|
///
|
||||||
|
/// Definitions
|
||||||
|
/// - BOARD_NAME
|
||||||
|
|
||||||
|
/// Name of the board.
|
||||||
|
#define BOARD_NAME "AT91SAM3S-EK"
|
||||||
|
/// Board definition.
|
||||||
|
#define at91sam3sek
|
||||||
|
/// Family definition (already defined).
|
||||||
|
#define at91sam3s
|
||||||
|
/// Core definition
|
||||||
|
#define cortexm3
|
||||||
|
|
||||||
|
//#define BOARD_REV_A
|
||||||
|
#define BOARD_REV_B
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies"
|
||||||
|
/// This page lists several definition related to the board operating frequency
|
||||||
|
/// (when using the initialization done by board_lowlevel.c).
|
||||||
|
///
|
||||||
|
/// !Definitions
|
||||||
|
/// - BOARD_MAINOSC
|
||||||
|
/// - BOARD_MCK
|
||||||
|
|
||||||
|
/// Frequency of the board main oscillator.
|
||||||
|
#define BOARD_MAINOSC 12000000
|
||||||
|
|
||||||
|
/// Master clock frequency (when using board_lowlevel.c).
|
||||||
|
//#define BOARD_MCK 48000000
|
||||||
|
#define BOARD_MCK 64000000
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
// ADC
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
/// Startup time max, return from Idle mode (in µs)
|
||||||
|
#define ADC_STARTUP_TIME_MAX 15
|
||||||
|
/// Track and hold Acquisition Time min (in ns)
|
||||||
|
#define ADC_TRACK_HOLD_TIME_MIN 1200
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
|
||||||
|
//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
|
||||||
|
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions"
|
||||||
|
/// This pages lists all the pio definitions contained in board.h. The constants
|
||||||
|
/// are named using the following convention: PIN_* for a constant which defines
|
||||||
|
/// a single Pin instance (but may include several PIOs sharing the same
|
||||||
|
/// controller), and PINS_* for a list of Pin instances.
|
||||||
|
///
|
||||||
|
/// !ADC
|
||||||
|
/// - PIN_ADC0_AD0
|
||||||
|
/// - PIN_ADC0_AD1
|
||||||
|
/// - PIN_ADC0_AD2
|
||||||
|
/// - PIN_ADC0_AD3
|
||||||
|
/// - PIN_ADC0_AD4
|
||||||
|
/// - PIN_ADC0_AD5
|
||||||
|
/// - PIN_ADC0_AD6
|
||||||
|
/// - PIN_ADC0_AD7
|
||||||
|
/// - PINS_ADC0
|
||||||
|
///
|
||||||
|
/// !UART
|
||||||
|
/// - PINS_UART
|
||||||
|
///
|
||||||
|
/// !EBI
|
||||||
|
/// - PIN_EBI_DATA_BUS
|
||||||
|
/// - PIN_EBI_NCS0
|
||||||
|
/// - PIN_EBI_NRD
|
||||||
|
/// - PIN_EBI_NWE
|
||||||
|
/// - PIN_EBI_ADDR_BUS
|
||||||
|
/// - PIN_EBI_PSRAM_NBS
|
||||||
|
/// - PIN_EBI_A1
|
||||||
|
/// - PIN_EBI_LCD_RS
|
||||||
|
///
|
||||||
|
/// !LEDs
|
||||||
|
/// - PIN_LED_0
|
||||||
|
/// - PIN_LED_1
|
||||||
|
/// - PIN_LED_2
|
||||||
|
/// - PINS_LEDS
|
||||||
|
///
|
||||||
|
/// !MCI
|
||||||
|
/// - PINS_MCI
|
||||||
|
///
|
||||||
|
/// !Push buttons
|
||||||
|
/// - PIN_PUSHBUTTON_1
|
||||||
|
/// - PIN_PUSHBUTTON_2
|
||||||
|
/// - PINS_PUSHBUTTONS
|
||||||
|
/// - PUSHBUTTON_BP1
|
||||||
|
/// - PUSHBUTTON_BP2
|
||||||
|
///
|
||||||
|
/// !PWMC
|
||||||
|
/// - PIN_PWMC_PWMH0
|
||||||
|
/// - PIN_PWMC_PWML0
|
||||||
|
/// - PIN_PWMC_PWMH1
|
||||||
|
/// - PIN_PWMC_PWML1
|
||||||
|
/// - PIN_PWMC_PWMH2
|
||||||
|
/// - PIN_PWMC_PWML2
|
||||||
|
/// - PIN_PWMC_PWMH3
|
||||||
|
/// - PIN_PWMC_PWML3
|
||||||
|
/// - PIN_PWM_LED0
|
||||||
|
/// - PIN_PWM_LED1
|
||||||
|
/// - PIN_PWM_LED2
|
||||||
|
/// - CHANNEL_PWM_LED0
|
||||||
|
/// - CHANNEL_PWM_LED1
|
||||||
|
/// - CHANNEL_PWM_LED2
|
||||||
|
///
|
||||||
|
/// !SPI
|
||||||
|
/// - PIN_SPI_MISO
|
||||||
|
/// - PIN_SPI_MOSI
|
||||||
|
/// - PIN_SPI_SPCK
|
||||||
|
/// - PINS_SPI
|
||||||
|
/// - PIN_SPI_NPCS0_PA11
|
||||||
|
///
|
||||||
|
/// ! SSC
|
||||||
|
/// - PIN_SSC_TD
|
||||||
|
/// - PIN_SSC_TK
|
||||||
|
/// - PIN_SSC_TF
|
||||||
|
/// - PINS_SSC_CODEC
|
||||||
|
///
|
||||||
|
/// ! PCK0
|
||||||
|
/// - PIN_PCK0
|
||||||
|
///
|
||||||
|
/// !TWI
|
||||||
|
/// - PIN_TWI_TWD0
|
||||||
|
/// - PIN_TWI_TWCK0
|
||||||
|
/// - PINS_TWI
|
||||||
|
///
|
||||||
|
/// !USART0
|
||||||
|
/// - PIN_USART0_RXD
|
||||||
|
/// - PIN_USART0_TXD
|
||||||
|
/// - PIN_USART0_CTS
|
||||||
|
/// - PIN_USART0_RTS
|
||||||
|
/// - PIN_USART0_SCK
|
||||||
|
///
|
||||||
|
/// !USB
|
||||||
|
/// - PIN_USB_PULLUP
|
||||||
|
///
|
||||||
|
|
||||||
|
/// ADC_AD0 pin definition.
|
||||||
|
#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD1 pin definition.
|
||||||
|
#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD2 pin definition.
|
||||||
|
#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD3 pin definition.
|
||||||
|
#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD4 pin definition.
|
||||||
|
#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD5 pin definition.
|
||||||
|
#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD6 pin definition.
|
||||||
|
#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// ADC_AD7 pin definition.
|
||||||
|
#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
|
||||||
|
/// Pins ADC
|
||||||
|
#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
|
||||||
|
|
||||||
|
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
|
||||||
|
#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
|
||||||
|
/// EBI
|
||||||
|
#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
|
||||||
|
#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
|
||||||
|
{1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
|
||||||
|
#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */
|
||||||
|
#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */
|
||||||
|
|
||||||
|
#ifdef BOARD_REV_A
|
||||||
|
/** LED #0 pin definition. */
|
||||||
|
#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
/** LED #1 pin definition. */
|
||||||
|
#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
/** LED #2 pin definition. */
|
||||||
|
#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
#endif
|
||||||
|
#ifdef BOARD_REV_B
|
||||||
|
/** LED #0 pin definition. */
|
||||||
|
#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
/** LED #1 pin definition. */
|
||||||
|
#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
/** LED #2 pin definition. */
|
||||||
|
#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** List of all LEDs definitions. */
|
||||||
|
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
||||||
|
|
||||||
|
/// MCI pins definition.
|
||||||
|
#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
|
||||||
|
{1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
|
||||||
|
/// MCI pin Card Detect
|
||||||
|
#define PIN_MCI_CD \
|
||||||
|
{AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||||
|
|
||||||
|
/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */
|
||||||
|
#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||||
|
/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */
|
||||||
|
#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||||
|
/** List of all push button definitions. */
|
||||||
|
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
||||||
|
|
||||||
|
/** Push button #1 index. */
|
||||||
|
#define PUSHBUTTON_BP1 0
|
||||||
|
/** Push button #2 index. */
|
||||||
|
#define PUSHBUTTON_BP2 1
|
||||||
|
|
||||||
|
/// Simulated joystick LEFT index.
|
||||||
|
#define JOYSTICK_LEFT 0
|
||||||
|
/// Simulated joystick RIGHT index.
|
||||||
|
#define JOYSTICK_RIGHT 1
|
||||||
|
|
||||||
|
/** PWMC PWM0 pin definition. */
|
||||||
|
#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
/** PWMC PWM1 pin definition. */
|
||||||
|
#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
/** PWMC PWM2 pin definition. */
|
||||||
|
#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||||
|
/** PWMC PWM3 pin definition. */
|
||||||
|
#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||||
|
/** PWM pin definition for LED0 */
|
||||||
|
#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0
|
||||||
|
/** PWM pin definition for LED1 */
|
||||||
|
#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2
|
||||||
|
/** PWM pin definition for LED2 */
|
||||||
|
#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3
|
||||||
|
/** PWM channel for LED0 */
|
||||||
|
#define CHANNEL_PWM_LED0 0
|
||||||
|
/** PWM channel for LED1 */
|
||||||
|
#define CHANNEL_PWM_LED1 2
|
||||||
|
/** PWM channel for LED2 */
|
||||||
|
#define CHANNEL_PWM_LED2 3
|
||||||
|
|
||||||
|
/** SPI MISO pin definition. */
|
||||||
|
#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
/** SPI MOSI pin definition. */
|
||||||
|
#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
/** SPI SPCK pin definition. */
|
||||||
|
#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
/** SPI chip select pin definition. */
|
||||||
|
#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
|
||||||
|
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
|
||||||
|
|
||||||
|
/// SSC pins definition.
|
||||||
|
#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
||||||
|
|
||||||
|
/// PCK0
|
||||||
|
#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||||
|
|
||||||
|
/// TWI pins definition.
|
||||||
|
#define TWI_V3XX
|
||||||
|
#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
||||||
|
#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
||||||
|
|
||||||
|
/// USART0
|
||||||
|
#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
|
||||||
|
/// USART1
|
||||||
|
#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||||
|
#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/// USB VBus monitoring pin definition.
|
||||||
|
#ifdef BOARD_REV_A
|
||||||
|
#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
#endif
|
||||||
|
#ifdef BOARD_REV_B
|
||||||
|
#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||||
|
/// This page lists the definitions related to external on-board components
|
||||||
|
/// located in the board.h file for the AT91SAM3S-EK.
|
||||||
|
///
|
||||||
|
/// !AT45 Dataflash Card
|
||||||
|
/// - BOARD_AT45_A_SPI_BASE
|
||||||
|
/// - BOARD_AT45_A_SPI_ID
|
||||||
|
/// - BOARD_AT45_A_SPI_PINS
|
||||||
|
/// - BOARD_AT45_A_SPI
|
||||||
|
/// - BOARD_AT45_A_NPCS
|
||||||
|
/// - BOARD_AT45_A_NPCS_PIN
|
||||||
|
///
|
||||||
|
/// !AT45 Dataflash (serial onboard DataFlash)
|
||||||
|
/// - BOARD_AT45_B_SPI_BASE
|
||||||
|
/// - BOARD_AT45_B_SPI_ID
|
||||||
|
/// - BOARD_AT45_B_SPI_PINS
|
||||||
|
/// - BOARD_AT45_B_SPI
|
||||||
|
/// - BOARD_AT45_B_NPCS
|
||||||
|
/// - BOARD_AT45_B_NPCS_PIN
|
||||||
|
///
|
||||||
|
/// !AT26 Serial Flash
|
||||||
|
/// - BOARD_AT26_A_SPI_BASE
|
||||||
|
/// - BOARD_AT26_A_SPI_ID
|
||||||
|
/// - BOARD_AT26_A_SPI_PINS
|
||||||
|
/// - BOARD_AT26_A_SPI
|
||||||
|
/// - BOARD_AT26_A_NPCS
|
||||||
|
/// - BOARD_AT26_A_NPCS_PIN
|
||||||
|
///
|
||||||
|
/// !SD Card
|
||||||
|
/// - MCI2_INTERFACE
|
||||||
|
/// - BOARD_SD_MCI_BASE
|
||||||
|
/// - BOARD_SD_MCI_ID
|
||||||
|
/// - BOARD_SD_PINS
|
||||||
|
/// - BOARD_SD_SLOT
|
||||||
|
///
|
||||||
|
/// !PSRAM
|
||||||
|
/// - BOARD_PSRAM_PINS
|
||||||
|
///
|
||||||
|
/// !LCD
|
||||||
|
/// - BOARD_LCD_ILI9325
|
||||||
|
/// - BOARD_LCD_PINS
|
||||||
|
/// - BOARD_BACKLIGHT_PIN
|
||||||
|
/// - BOARD_LCD_BASE
|
||||||
|
/// - BOARD_LCD_RS
|
||||||
|
/// - BOARD_LCD_WIDTH
|
||||||
|
/// - BOARD_LCD_HEIGHT
|
||||||
|
///
|
||||||
|
/// !TouchScreen
|
||||||
|
/// - BOARD_TSC_ADS7843
|
||||||
|
/// - PIN_TCS_IRQ
|
||||||
|
/// - PIN_TCS_BUSY
|
||||||
|
/// - BOARD_TSC_SPI_BASE
|
||||||
|
/// - BOARD_TSC_SPI_ID
|
||||||
|
/// - BOARD_TSC_SPI_PINS
|
||||||
|
/// - BOARD_TSC_NPCS
|
||||||
|
/// - BOARD_TSC_NPCS_PIN
|
||||||
|
///
|
||||||
|
/// Base address of SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_A_SPI_BASE SPI0
|
||||||
|
///// Identifier of SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_A_SPI_ID ID_SPI0
|
||||||
|
///// Pins of the SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
|
||||||
|
///// Dataflahs SPI number.
|
||||||
|
//#define BOARD_AT45_A_SPI 0
|
||||||
|
///// Chip select connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_A_NPCS 3
|
||||||
|
///// Chip select pin connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||||
|
|
||||||
|
/// Base address of SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_B_SPI_BASE SPI1
|
||||||
|
///// Identifier of SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_B_SPI_ID ID_SPI1
|
||||||
|
///// Pins of the SPI peripheral connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
|
||||||
|
///// Dataflahs SPI number.
|
||||||
|
//#define BOARD_AT45_B_SPI 1
|
||||||
|
///// Chip select connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_B_NPCS 3
|
||||||
|
///// Chip select pin connected to the dataflash.
|
||||||
|
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
|
||||||
|
|
||||||
|
/// Base address of SPI peripheral connected to the serialflash.
|
||||||
|
//#define BOARD_AT26_A_SPI_BASE SPI0
|
||||||
|
///// Identifier of SPI peripheral connected to the serialflash.
|
||||||
|
//#define BOARD_AT26_A_SPI_ID ID_SPI0
|
||||||
|
///// Pins of the SPI peripheral connected to the serialflash.
|
||||||
|
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
|
||||||
|
///// Serialflash SPI number.
|
||||||
|
//#define BOARD_AT26_A_SPI 0
|
||||||
|
///// Chip select connected to the serialflash.
|
||||||
|
//#define BOARD_AT26_A_NPCS 3
|
||||||
|
///// Chip select pin connected to the serialflash.
|
||||||
|
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||||
|
|
||||||
|
/// ISO7816
|
||||||
|
/// - PIN_SMARTCARD_CONNECT
|
||||||
|
/// - PIN_ISO7816_RSTMC
|
||||||
|
/// - PINS_ISO7816
|
||||||
|
|
||||||
|
/// Smartcard detection pin
|
||||||
|
//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||||
|
/// PIN used for reset the smartcard
|
||||||
|
//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||||
|
/// Pins used for connect the smartcard
|
||||||
|
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
|
||||||
|
|
||||||
|
/// Dma channel number
|
||||||
|
#define BOARD_MCI_DMA_CHANNEL 0
|
||||||
|
/// MCI0 DMA hardware handshaking ID
|
||||||
|
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
|
||||||
|
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
|
||||||
|
/// MCI1 DMA hardware handshaking ID
|
||||||
|
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
|
||||||
|
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
|
||||||
|
/// SD DMA hardware handshaking ID
|
||||||
|
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
|
||||||
|
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
|
||||||
|
|
||||||
|
|
||||||
|
/// HS MCI interface
|
||||||
|
#define MCI2_INTERFACE
|
||||||
|
/// Base address of the MCI peripheral connected to the SD card.
|
||||||
|
#define BOARD_SD_MCI_BASE MCI0//MCI
|
||||||
|
///// Peripheral identifier of the MCI connected to the SD card.
|
||||||
|
#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI
|
||||||
|
///// MCI pins that shall be configured to access the SD card.
|
||||||
|
#define BOARD_SD_PINS PINS_MCI
|
||||||
|
///// MCI slot to which the SD card is connected to.
|
||||||
|
#define BOARD_SD_SLOT MCI_SD_SLOTA
|
||||||
|
///// MCI Card Detect pin.
|
||||||
|
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
||||||
|
|
||||||
|
/*
|
||||||
|
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||||
|
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** Indicates board has an ILI9325 external component to manage LCD. */
|
||||||
|
#define BOARD_LCD_ILI9325
|
||||||
|
|
||||||
|
/** LCD pins definition. */
|
||||||
|
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||||
|
PIN_EBI_NCS1, PIN_EBI_LCD_RS
|
||||||
|
/** Backlight pin definition. */
|
||||||
|
#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||||
|
/** Define ILI9325 base address. */
|
||||||
|
#define BOARD_LCD_BASE 0x61000000
|
||||||
|
/** Define ILI9325 register select signal. */
|
||||||
|
#define BOARD_LCD_RS (1 << 1)
|
||||||
|
/** Display width in pixels. */
|
||||||
|
#define BOARD_LCD_WIDTH 240
|
||||||
|
/** Display height in pixels. */
|
||||||
|
#define BOARD_LCD_HEIGHT 320
|
||||||
|
|
||||||
|
/** Indicates board has an ADS7843 external component to manage Touch Screen */
|
||||||
|
#define BOARD_TSC_ADS7843
|
||||||
|
|
||||||
|
#ifdef BOARD_REV_A
|
||||||
|
/** Touchscreen controller IRQ pin definition. */
|
||||||
|
#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||||
|
#define PIN_TCS_IRQ_WUP_ID (1 << 3)
|
||||||
|
/** Touchscreen controller Busy pin definition. */
|
||||||
|
#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||||
|
#endif
|
||||||
|
#ifdef BOARD_REV_B
|
||||||
|
/** Touchscreen controller IRQ pin definition. */
|
||||||
|
#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||||
|
#define PIN_TCS_IRQ_WUP_ID (1 << 15)
|
||||||
|
/** Touchscreen controller Busy pin definition. */
|
||||||
|
#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** Base address of SPI peripheral connected to the touchscreen controller. */
|
||||||
|
#define BOARD_TSC_SPI_BASE SPI
|
||||||
|
/** Identifier of SPI peripheral connected to the touchscreen controller. */
|
||||||
|
#define BOARD_TSC_SPI_ID ID_SPI
|
||||||
|
/** Pins of the SPI peripheral connected to the touchscreen controller. */
|
||||||
|
#define BOARD_TSC_SPI_PINS PINS_SPI
|
||||||
|
/** Chip select connected to the touchscreen controller. */
|
||||||
|
#define BOARD_TSC_NPCS 0
|
||||||
|
/** Chip select pin connected to the touchscreen controller. */
|
||||||
|
#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par sam3s_ek_mem "SAM3S-EK - Memories"
|
||||||
|
/// This page lists definitions related to internal & external on-board memories.
|
||||||
|
///
|
||||||
|
/// !Embedded Flash
|
||||||
|
/// - BOARD_FLASH_EFC
|
||||||
|
|
||||||
|
/// Internal SRAM address
|
||||||
|
#define AT91C_ISRAM AT91C_IRAM
|
||||||
|
#define AT91C_ISRAM_SIZE 0x00008000
|
||||||
|
|
||||||
|
#define AT91C_IFLASH_SIZE (0x40000)
|
||||||
|
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
|
||||||
|
#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512
|
||||||
|
#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes
|
||||||
|
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \section sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||||
|
/// This page lists the definitions related to external on-board components
|
||||||
|
/// located in the board.h file for the SAM3S-EK.
|
||||||
|
///
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition"
|
||||||
|
/// This page lists the definitions related to different chip's definition
|
||||||
|
/// located in the board.h file for the SAM3S-EK.
|
||||||
|
|
||||||
|
/// DBGU
|
||||||
|
#define BOARD_DBGU_ID ID_DBGU
|
||||||
|
|
||||||
|
/// Rtc
|
||||||
|
#define BOARD_RTC_ID ID_RTC
|
||||||
|
|
||||||
|
/// Twi eeprom
|
||||||
|
#define BOARD_ID_TWI_EEPROM ID_TWI1
|
||||||
|
#define BOARD_BASE_TWI_EEPROM TWI1
|
||||||
|
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
||||||
|
|
||||||
|
/// USART
|
||||||
|
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
||||||
|
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
||||||
|
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
||||||
|
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
||||||
|
#define BOARD_PIN_USART_EN PIN_USART1_EN
|
||||||
|
#define BOARD_USART_BASE USART1
|
||||||
|
#define BOARD_ID_USART ID_USART1
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
|
#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||||
|
|
||||||
|
/// Nandflash chip enable pin definition.
|
||||||
|
#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||||
|
/// Nandflash ready/busy pin definition.
|
||||||
|
#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
|
||||||
|
|
||||||
|
/// Nandflash controller peripheral pins definition.
|
||||||
|
#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \
|
||||||
|
PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
||||||
|
|
||||||
|
/// Address for transferring command bytes to the nandflash.
|
||||||
|
#define BOARD_NF_COMMAND_ADDR 0x60400000
|
||||||
|
/// Address for transferring address bytes to the nandflash.
|
||||||
|
#define BOARD_NF_ADDRESS_ADDR 0x60200000
|
||||||
|
/// Address for transferring data bytes to the nandflash.
|
||||||
|
#define BOARD_NF_DATA_ADDR 0x60000000
|
||||||
|
|
||||||
|
#endif //#ifndef BOARD_H
|
||||||
|
|
||||||
229
src/ersky9x/board_lowlevel.c
Normal file
229
src/ersky9x/board_lowlevel.c
Normal file
|
|
@ -0,0 +1,229 @@
|
||||||
|
/* ----------------------------------------------------------------------------
|
||||||
|
* ATMEL Microcontroller Software Support
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
* Copyright (c) 2008, Atmel Corporation
|
||||||
|
*
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* - Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the disclaimer below.
|
||||||
|
*
|
||||||
|
* Atmel's name may not be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||||
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||||
|
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||||
|
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \file
|
||||||
|
*
|
||||||
|
* \par Purpose
|
||||||
|
*
|
||||||
|
* Provides the low-level initialization function that gets called on chip startup.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
* Headers
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
#include "board.h"
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
* Local definitions
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
/** Define clock timeout */
|
||||||
|
#define CLOCK_TIMEOUT 5000
|
||||||
|
/** Bit 29 must always be set to 1 when programming the CKGR_PLLAR register.*/
|
||||||
|
#define PMC_PLLA_SET_BIT29 (0x1 << 29)
|
||||||
|
/** Specifies the number of Slow Clock cycles x8 before the LOCKA bit is set in PMC_SR after CKGR_PLLAR is written.*/
|
||||||
|
#define PMC_PLLA_COUNT (0xBF << 8)
|
||||||
|
/** The PLLA Clock frequency is the PLLA input frequency multiplied by 8*/
|
||||||
|
#define PMC_PLLA_MULTIPIER (0x07 << 16)
|
||||||
|
/** PLLA Divider is bypassed.*/
|
||||||
|
#define PMC_PLLA_DIV (0x01)
|
||||||
|
|
||||||
|
void revert_osc( void ) ;
|
||||||
|
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
* Local functions
|
||||||
|
* returns master_frequency
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
// *** WARNING, this is called BEFORE .data and .bss have been initialised
|
||||||
|
// *** GLOBAL variables are NOT useable
|
||||||
|
|
||||||
|
static uint32_t BOARD_ConfigurePmc(void)
|
||||||
|
{
|
||||||
|
/* TODO: configurate PLL in new way */
|
||||||
|
//#if 0
|
||||||
|
// uint32_t timeout = 0;
|
||||||
|
// /** 1: Checking the Main Oscillator Frequency (Optional) and Initialize main oscillator */
|
||||||
|
// /** 1.1 Initialize main oscillator */
|
||||||
|
// // TODO:
|
||||||
|
|
||||||
|
// /** 2. Setting PLL and Divider*/
|
||||||
|
// /** 2.1 Initialize PLLA*/
|
||||||
|
// PMC->CKGR_PLLAR = ( PMC_PLLA_SET_BIT29 |
|
||||||
|
// PMC_PLLA_MULTIPIER |
|
||||||
|
// PMC_PLLA_COUNT |
|
||||||
|
// PMC_PLLA_DIV
|
||||||
|
// );
|
||||||
|
// timeout = 0;
|
||||||
|
// /** 2.2 Wait for the LOCKA bit to be set by polling the status register.*/
|
||||||
|
// while (!(PMC->PMC_SR & PMC_SR_LOCKA) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
// /** 2.3 wait for the MCKRDY bit to be set by polling the status register*/
|
||||||
|
// timeout = 0;
|
||||||
|
// while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
// /** 3. Selection of Master Clock and Processor Clock*/
|
||||||
|
// PMC->PMC_MCKR |= PMC_MCKR_PRES_CLK_2;
|
||||||
|
|
||||||
|
// /** 3.1 wait for the MCKRDY bit to be set by polling the status register*/
|
||||||
|
// timeout = 0;
|
||||||
|
// while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
// /** 3.2 PLLA Clock is selected */
|
||||||
|
// PMC->PMC_MCKR = PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK;
|
||||||
|
|
||||||
|
// /** 3.3 wait for the MCKRDY bit to be set by polling the status register*/
|
||||||
|
// timeout = 0;
|
||||||
|
// while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
//#endif
|
||||||
|
|
||||||
|
#if 1 // old as sam3u
|
||||||
|
#define AT91C_CKGR_MUL_SHIFT 16
|
||||||
|
//#define AT91C_CKGR_OUT_SHIFT 14
|
||||||
|
#define AT91C_CKGR_PLLCOUNT_SHIFT 8
|
||||||
|
#define AT91C_CKGR_DIV_SHIFT 0
|
||||||
|
|
||||||
|
// Settings at 72MHz/2 = 36MHz
|
||||||
|
#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST & (0x8 << 8))
|
||||||
|
#define BOARD_PLLR ((1 << 29) | (0x5 << AT91C_CKGR_MUL_SHIFT) \
|
||||||
|
| (0x1 << AT91C_CKGR_PLLCOUNT_SHIFT) | (0x2 << AT91C_CKGR_DIV_SHIFT))
|
||||||
|
#define BOARD_MCKR (PMC_MCKR_CSS_PLLA_CLK)
|
||||||
|
|
||||||
|
// Define clock timeout
|
||||||
|
#undef CLOCK_TIMEOUT
|
||||||
|
#define CLOCK_TIMEOUT 0xFFFFFFFF
|
||||||
|
|
||||||
|
register uint32_t timeout = 0 ;
|
||||||
|
register Pmc *pmcptr ;
|
||||||
|
|
||||||
|
pmcptr = PMC ;
|
||||||
|
|
||||||
|
/* Enable NRST reset
|
||||||
|
************************************/
|
||||||
|
//AT91C_BASE_RSTC->RSTC_RMR |= AT91C_RSTC_URSTEN;
|
||||||
|
|
||||||
|
/* Select external slow clock
|
||||||
|
****************************/
|
||||||
|
|
||||||
|
|
||||||
|
// if ((SUPC->SUPC_SR & SUPC_SR_OSCSEL) != SUPC_SR_OSCSEL_CRYST) {
|
||||||
|
// SUPC->SUPC_CR = SUPC_CR_XTALSEL_CRYSTAL_SEL | ((uint32_t)0xA5 << 24);
|
||||||
|
// timeout = 0;
|
||||||
|
// while (!(SUPC->SUPC_SR & SUPC_SR_OSCSEL_CRYST) );
|
||||||
|
// }
|
||||||
|
|
||||||
|
|
||||||
|
/* Initialize main oscillator
|
||||||
|
****************************/
|
||||||
|
if(!(pmcptr->CKGR_MOR & CKGR_MOR_MOSCSEL))
|
||||||
|
{
|
||||||
|
|
||||||
|
pmcptr->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_MOSCXTS) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Switch to 3-20MHz Xtal oscillator */
|
||||||
|
pmcptr->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_MOSCSELS) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
pmcptr->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_MCKRDY) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
/* Initialize PLLA 72 MHz */
|
||||||
|
pmcptr->CKGR_PLLAR = BOARD_PLLR;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_LOCKA) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
|
||||||
|
/* Initialize UTMI for USB usage, can be disabled if not using USB for the sake of saving power*/
|
||||||
|
//AT91C_BASE_CKGR->CKGR_UCKR |= (AT91C_CKGR_UPLLCOUNT & (3 << 20)) | AT91C_CKGR_UPLLEN;
|
||||||
|
//timeout = 0;
|
||||||
|
//while (!(PMC->PMC_SR & AT91C_PMC_LOCKU) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
/* Switch to fast clock
|
||||||
|
**********************/
|
||||||
|
// PMC->PMC_MCKR = (BOARD_MCKR & ~PMC_MCKR_CSS) | PMC_MCKR_CSS_MAIN_CLK;
|
||||||
|
// timeout = 0;
|
||||||
|
// while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
// Switch to PLLA as main clock 36MHz
|
||||||
|
PMC->PMC_MCKR = BOARD_MCKR;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(PMC->PMC_SR & PMC_SR_MCKRDY) && (timeout++ < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
#endif
|
||||||
|
return 36000000L ; // Master_frequency
|
||||||
|
}
|
||||||
|
|
||||||
|
void revert_osc()
|
||||||
|
{
|
||||||
|
register uint32_t timeout = 0 ;
|
||||||
|
register Pmc *pmcptr ;
|
||||||
|
|
||||||
|
pmcptr = PMC ;
|
||||||
|
|
||||||
|
|
||||||
|
// Switch back to the internal oscillator
|
||||||
|
pmcptr->CKGR_MOR = (0x37 << 16) | BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN ;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_MOSCSELS) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
pmcptr->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS) | PMC_MCKR_CSS_SLOW_CLK;
|
||||||
|
timeout = 0;
|
||||||
|
while (!(pmcptr->PMC_SR & PMC_SR_MCKRDY) && (++timeout < CLOCK_TIMEOUT));
|
||||||
|
|
||||||
|
|
||||||
|
pmcptr->CKGR_PLLAR = 1 << 29 ; // Stop PLLA
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------
|
||||||
|
* Exported functions
|
||||||
|
*----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* \brief Performs the low-level initialization of the chip. This includes EFC,
|
||||||
|
* master clock and watchdog configuration.
|
||||||
|
*/
|
||||||
|
/*----------------------------------------------------------------------------*/
|
||||||
|
uint32_t SystemInit (void)
|
||||||
|
{
|
||||||
|
/** Set 2 cycle (1 WS) for Embedded Flash Access */
|
||||||
|
// Max clock is 38 MHz (1.8V VVDCORE)
|
||||||
|
EFC->EEFC_FMR = (1 << 8) ;
|
||||||
|
|
||||||
|
/** Configure PMC */
|
||||||
|
return BOARD_ConfigurePmc();
|
||||||
|
}
|
||||||
130
src/ersky9x/chip.h
Normal file
130
src/ersky9x/chip.h
Normal file
|
|
@ -0,0 +1,130 @@
|
||||||
|
/* ----------------------------------------------------------------------------
|
||||||
|
* ATMEL Microcontroller Software Support
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
* Copyright (c) 2008, Atmel Corporation
|
||||||
|
*
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* - Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the disclaimer below.
|
||||||
|
*
|
||||||
|
* Atmel's name may not be used to endorse or promote products derived from
|
||||||
|
* this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||||
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||||
|
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||||
|
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
* ----------------------------------------------------------------------------
|
||||||
|
*/
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \unit
|
||||||
|
/// !Purpose
|
||||||
|
///
|
||||||
|
/// Definition of AT91SAM3S4 characteristics and features
|
||||||
|
///
|
||||||
|
/// !Usage
|
||||||
|
/// -# For ARM core feature, see "AT91SAM3S4 - ARM core features".
|
||||||
|
/// -# For IP features, see "AT91SAM3S4 - IP features".
|
||||||
|
/// -# For misc, see "AT91SAM3S4 - Misc".
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
#ifndef CHIP_H
|
||||||
|
#define CHIP_H
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
// Headers
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
// Definitions
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \page "AT91SAM3S4 - ARM core features"
|
||||||
|
/// This page lists several characteristics related to the ARM core
|
||||||
|
///
|
||||||
|
|
||||||
|
//ARM core features
|
||||||
|
|
||||||
|
/// ARM core definition.
|
||||||
|
#define cortexm3
|
||||||
|
|
||||||
|
/// family definition.
|
||||||
|
#define at91sam3s
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \page "AT91SAM3S4 - IP features"
|
||||||
|
/// This page lists several characteristics related to the embedded IP
|
||||||
|
///
|
||||||
|
|
||||||
|
//IP FEATURES
|
||||||
|
|
||||||
|
// EFC GPNVM number
|
||||||
|
#define CHIP_EFC_NUM_GPNVMS 3
|
||||||
|
|
||||||
|
/// Indicates chip has an Enhanced EFC.
|
||||||
|
#define CHIP_FLASH_EEFC
|
||||||
|
|
||||||
|
// DMA channels number
|
||||||
|
#define CHIP_DMA_CHANNEL_NUM 4
|
||||||
|
|
||||||
|
// Indicate chip's MCI interface.
|
||||||
|
#define MCI2_INTERFACE
|
||||||
|
|
||||||
|
// Indicate chip SSC has DMA interface.
|
||||||
|
#define CHIP_SSC_DMA
|
||||||
|
|
||||||
|
// Indicate chip SPI has DMA interface.
|
||||||
|
#define CHIP_SPI_DMA
|
||||||
|
|
||||||
|
/// Indicates chip has an UDP Full Speed.
|
||||||
|
#define CHIP_USB_UDP
|
||||||
|
|
||||||
|
/// Indicates chip has an internal pull-up.
|
||||||
|
#define CHIP_USB_PULLUP_INTERNAL
|
||||||
|
|
||||||
|
/// Number of USB endpoints
|
||||||
|
#define CHIP_USB_NUMENDPOINTS 8
|
||||||
|
|
||||||
|
/// Endpoints max paxcket size
|
||||||
|
#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \
|
||||||
|
((i == 0) ? 64 : \
|
||||||
|
((i == 1) ? 64 : \
|
||||||
|
((i == 2) ? 64 : \
|
||||||
|
((i == 3) ? 64 : \
|
||||||
|
((i == 4) ? 512 : \
|
||||||
|
((i == 5) ? 512 : \
|
||||||
|
((i == 6) ? 64 : \
|
||||||
|
((i == 7) ? 64 : 0 ))))))))
|
||||||
|
|
||||||
|
/// Endpoints Number of Bank
|
||||||
|
#define CHIP_USB_ENDPOINTS_BANKS(i) \
|
||||||
|
((i == 0) ? 1 : \
|
||||||
|
((i == 1) ? 2 : \
|
||||||
|
((i == 2) ? 2 : \
|
||||||
|
((i == 3) ? 1 : \
|
||||||
|
((i == 4) ? 2 : \
|
||||||
|
((i == 5) ? 2 : \
|
||||||
|
((i == 6) ? 2 : \
|
||||||
|
((i == 7) ? 2 : 0 ))))))))
|
||||||
|
|
||||||
|
//------------------------------------------------------------------------------
|
||||||
|
/// \page "AT91SAM3S4 - Misc "
|
||||||
|
/// This page lists misc features
|
||||||
|
///
|
||||||
|
|
||||||
|
//Misc
|
||||||
|
|
||||||
|
#endif //#ifndef CHIP_H
|
||||||
|
|
||||||
831
src/ersky9x/core_cm3.c
Normal file
831
src/ersky9x/core_cm3.c
Normal file
|
|
@ -0,0 +1,831 @@
|
||||||
|
/**************************************************************************//**
|
||||||
|
* @file core_cm3.c
|
||||||
|
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File
|
||||||
|
* @version V1.30
|
||||||
|
* @date 30. October 2009
|
||||||
|
*
|
||||||
|
* @note
|
||||||
|
* Copyright (C) 2009 ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||||
|
* processor based microcontrollers. This file can be freely distributed
|
||||||
|
* within development tools that are supporting such ARM based processors.
|
||||||
|
*
|
||||||
|
* @par
|
||||||
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||||
|
* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||||
|
* ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||||
|
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||||
|
*
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/* define compiler specific symbols */
|
||||||
|
#if defined ( __CC_ARM )
|
||||||
|
#define __ASM __asm /*!< asm keyword for ARM Compiler */
|
||||||
|
#define __INLINE __inline /*!< inline keyword for ARM Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __ICCARM__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for IAR Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||||
|
|
||||||
|
#elif defined ( __GNUC__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for GNU Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for GNU Compiler */
|
||||||
|
|
||||||
|
#elif defined ( __TASKING__ )
|
||||||
|
#define __ASM __asm /*!< asm keyword for TASKING Compiler */
|
||||||
|
#define __INLINE inline /*!< inline keyword for TASKING Compiler */
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
uint32_t __get_PSP(void) ;
|
||||||
|
void __set_PSP(uint32_t topOfProcStack) ;
|
||||||
|
uint32_t __get_MSP(void) ;
|
||||||
|
void __set_MSP(uint32_t mainStackPointer) ;
|
||||||
|
uint32_t __REV16(uint16_t value) ;
|
||||||
|
int32_t __REVSH(int16_t value) ;
|
||||||
|
uint32_t __RBIT(uint32_t value) ;
|
||||||
|
uint8_t __LDREXB(uint8_t *addr) ;
|
||||||
|
uint16_t __LDREXH(uint16_t *addr) ;
|
||||||
|
uint32_t __LDREXW(uint32_t *addr) ;
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr) ;
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr) ;
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr) ;
|
||||||
|
|
||||||
|
uint32_t __get_BASEPRI(void) ;
|
||||||
|
void __set_BASEPRI(uint32_t basePri) ;
|
||||||
|
uint32_t __get_PRIMASK(void) ;
|
||||||
|
void __set_PRIMASK(uint32_t priMask) ;
|
||||||
|
uint32_t __get_FAULTMASK(void) ;
|
||||||
|
void __set_FAULTMASK(uint32_t faultMask) ;
|
||||||
|
uint32_t __get_CONTROL(void) ;
|
||||||
|
void __set_CONTROL(uint32_t control) ;
|
||||||
|
uint32_t __REV(uint32_t value) ;
|
||||||
|
|
||||||
|
void revert_osc( void ) ;
|
||||||
|
void sam_boot( void ) ;
|
||||||
|
|
||||||
|
|
||||||
|
/* ################### Compiler specific Intrinsics ########################### */
|
||||||
|
|
||||||
|
#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
|
||||||
|
/* ARM armcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, psp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
msr psp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
mrs r0, msp
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
__ASM void __set_MSP(uint32_t mainStackPointer)
|
||||||
|
{
|
||||||
|
msr msp, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
rev16 r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
__ASM int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
revsh r0, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#if (__ARMCC_VERSION < 400000)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Remove the exclusive lock created by ldrex
|
||||||
|
*
|
||||||
|
* Removes the exclusive lock which is created by ldrex.
|
||||||
|
*/
|
||||||
|
__ASM void __CLREX(void)
|
||||||
|
{
|
||||||
|
clrex
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
mrs r0, basepri
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
__ASM void __set_BASEPRI(uint32_t basePri)
|
||||||
|
{
|
||||||
|
msr basepri, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, primask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
msr primask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
mrs r0, faultmask
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
__ASM void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
msr faultmask, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
__ASM uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
mrs r0, control
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
__ASM void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
msr control, r0
|
||||||
|
bx lr
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* __ARMCC_VERSION */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
|
||||||
|
/* IAR iccarm specific functions */
|
||||||
|
#pragma diag_suppress=Pe940
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, psp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM("msr psp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
__ASM("mrs r0, msp");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM("msr msp, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
__ASM("rev16 r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM("rbit r0, r0");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit values)
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexb r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrexh r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("ldrex r0, [r0]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexb r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strexh r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
__ASM("strex r0, r0, [r1]");
|
||||||
|
__ASM("bx lr");
|
||||||
|
}
|
||||||
|
|
||||||
|
#pragma diag_default=Pe940
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
|
||||||
|
/* GNU gcc specific functions */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @return ProcessStackPointer
|
||||||
|
*
|
||||||
|
* Return the actual process stack pointer
|
||||||
|
*/
|
||||||
|
/*extern uint32_t __get_PSP(void) __attribute__( ( naked ) ); */
|
||||||
|
uint32_t __get_PSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, psp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Process Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfProcStack Process Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value ProcessStackPointer to the MSP
|
||||||
|
* (process stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
/*void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); */
|
||||||
|
void __set_PSP(uint32_t topOfProcStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR psp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfProcStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @return Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Return the current value of the MSP (main stack pointer)
|
||||||
|
* Cortex processor register
|
||||||
|
*/
|
||||||
|
/*uint32_t __get_MSP(void) __attribute__( ( naked ) ); */
|
||||||
|
uint32_t __get_MSP(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, msp\n\t"
|
||||||
|
"MOV r0, %0 \n\t"
|
||||||
|
"BX lr \n\t" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Main Stack Pointer
|
||||||
|
*
|
||||||
|
* @param topOfMainStack Main Stack Pointer
|
||||||
|
*
|
||||||
|
* Assign the value mainStackPointer to the MSP
|
||||||
|
* (main stack pointer) Cortex processor register
|
||||||
|
*/
|
||||||
|
/*void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); */
|
||||||
|
void __set_MSP(uint32_t topOfMainStack)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR msp, %0\n\t"
|
||||||
|
"BX lr \n\t" : : "r" (topOfMainStack) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Base Priority value
|
||||||
|
*
|
||||||
|
* @return BasePriority
|
||||||
|
*
|
||||||
|
* Return the content of the base priority register
|
||||||
|
*/
|
||||||
|
uint32_t __get_BASEPRI(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Base Priority value
|
||||||
|
*
|
||||||
|
* @param basePri BasePriority
|
||||||
|
*
|
||||||
|
* Set the base priority register
|
||||||
|
*/
|
||||||
|
void __set_BASEPRI(uint32_t value)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR basepri, %0" : : "r" (value) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Priority Mask value
|
||||||
|
*
|
||||||
|
* @return PriMask
|
||||||
|
*
|
||||||
|
* Return state of the priority mask bit from the priority mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_PRIMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, primask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Priority Mask value
|
||||||
|
*
|
||||||
|
* @param priMask PriMask
|
||||||
|
*
|
||||||
|
* Set the priority mask bit in the priority mask register
|
||||||
|
*/
|
||||||
|
void __set_PRIMASK(uint32_t priMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Fault Mask value
|
||||||
|
*
|
||||||
|
* @return FaultMask
|
||||||
|
*
|
||||||
|
* Return the content of the fault mask register
|
||||||
|
*/
|
||||||
|
uint32_t __get_FAULTMASK(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Fault Mask value
|
||||||
|
*
|
||||||
|
* @param faultMask faultMask value
|
||||||
|
*
|
||||||
|
* Set the fault mask register
|
||||||
|
*/
|
||||||
|
void __set_FAULTMASK(uint32_t faultMask)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Return the Control Register value
|
||||||
|
*
|
||||||
|
* @return Control value
|
||||||
|
*
|
||||||
|
* Return the content of the control register
|
||||||
|
*/
|
||||||
|
uint32_t __get_CONTROL(void)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("MRS %0, control" : "=r" (result) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Set the Control Register value
|
||||||
|
*
|
||||||
|
* @param control Control value
|
||||||
|
*
|
||||||
|
* Set the control register
|
||||||
|
*/
|
||||||
|
void __set_CONTROL(uint32_t control)
|
||||||
|
{
|
||||||
|
__ASM volatile ("MSR control, %0" : : "r" (control) );
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in integer value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in integer value
|
||||||
|
*/
|
||||||
|
uint32_t __REV(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in unsigned short value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in unsigned short value
|
||||||
|
*/
|
||||||
|
uint32_t __REV16(uint16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse byte order in signed short value with sign extension to integer
|
||||||
|
*/
|
||||||
|
int32_t __REVSH(int16_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Reverse bit order of value
|
||||||
|
*
|
||||||
|
* @param value value to reverse
|
||||||
|
* @return reversed value
|
||||||
|
*
|
||||||
|
* Reverse bit order of value
|
||||||
|
*/
|
||||||
|
uint32_t __RBIT(uint32_t value)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 8 bit value
|
||||||
|
*/
|
||||||
|
uint8_t __LDREXB(uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint8_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint16_t __LDREXH(uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint16_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief LDR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return value of (*address)
|
||||||
|
*
|
||||||
|
* Exclusive LDR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __LDREXW(uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (8 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 8 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXB(uint8_t value, uint8_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (16 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 16 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXH(uint16_t value, uint16_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief STR Exclusive (32 bit)
|
||||||
|
*
|
||||||
|
* @param value value to store
|
||||||
|
* @param *addr address pointer
|
||||||
|
* @return successful / failed
|
||||||
|
*
|
||||||
|
* Exclusive STR command for 32 bit values
|
||||||
|
*/
|
||||||
|
uint32_t __STREXW(uint32_t value, uint32_t *addr)
|
||||||
|
{
|
||||||
|
uint32_t result=0;
|
||||||
|
|
||||||
|
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||||
|
return(result);
|
||||||
|
}
|
||||||
|
|
||||||
|
void sam_boot()
|
||||||
|
{
|
||||||
|
revert_osc() ;
|
||||||
|
|
||||||
|
__ASM(" mov.w r1, #8388608");
|
||||||
|
__ASM(" movw r0, #60680");
|
||||||
|
__ASM(" movt r0, #57344");
|
||||||
|
__ASM(" str r1, [r0, #0]"); // Set the VTOR
|
||||||
|
|
||||||
|
__ASM("mov.w r3, #0");
|
||||||
|
__ASM("movt r3, #128");
|
||||||
|
__ASM("ldr r0, [r3, #0]");
|
||||||
|
__ASM("msr msp, r0");
|
||||||
|
__ASM("ldr r0, [r3, #4]");
|
||||||
|
__ASM("mov.w r3, #1");
|
||||||
|
__ASM("orr r0, r3");
|
||||||
|
__ASM("bx r0");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
|
||||||
|
/* TASKING carm specific functions */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||||
|
* Please use "carm -?i" to get an up to date list of all instrinsics,
|
||||||
|
* Including the CMSIS ones.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#endif
|
||||||
1818
src/ersky9x/core_cm3.h
Normal file
1818
src/ersky9x/core_cm3.h
Normal file
File diff suppressed because it is too large
Load diff
147
src/ersky9x/crt.c
Normal file
147
src/ersky9x/crt.c
Normal file
|
|
@ -0,0 +1,147 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* Copyright (c) 2011 by Michael Fischer. All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of the author nor the names of its contributors may
|
||||||
|
* be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||||
|
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||||
|
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************
|
||||||
|
* History:
|
||||||
|
*
|
||||||
|
* 09.04.2011 mifi First Version
|
||||||
|
* 29.04.2011 mifi Call SystemInit, and set the Vector Table Offset
|
||||||
|
* before copy of data and bss segment.
|
||||||
|
****************************************************************************/
|
||||||
|
#define __CRT_C__
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: All extern Data */
|
||||||
|
/*=========================================================================*/
|
||||||
|
/*
|
||||||
|
* The next data are defined by the linker script.
|
||||||
|
*/
|
||||||
|
extern unsigned long _stext;
|
||||||
|
extern unsigned long _etext;
|
||||||
|
extern unsigned long _sdata;
|
||||||
|
extern unsigned long _edata;
|
||||||
|
extern unsigned long _sbss;
|
||||||
|
extern unsigned long _ebss;
|
||||||
|
extern unsigned long _estack;
|
||||||
|
|
||||||
|
/* This is the main */
|
||||||
|
extern int main (void);
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: Prototypes */
|
||||||
|
/*=========================================================================*/
|
||||||
|
extern uint32_t SystemInit (void) ; // __attribute__((weak));
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: All code exported */
|
||||||
|
/*=========================================================================*/
|
||||||
|
|
||||||
|
/***************************************************************************/
|
||||||
|
/* SystemInit */
|
||||||
|
/* */
|
||||||
|
/* SystemInit is a function which is provided by the CMSIS interface. */
|
||||||
|
/* If this function is not available, we need a function here to prevent */
|
||||||
|
/* an error of the linker. Therefore this function is declared as weak. */
|
||||||
|
/***************************************************************************/
|
||||||
|
//uint32_t SystemInit (void)
|
||||||
|
//{
|
||||||
|
|
||||||
|
//} /* SystemInit */
|
||||||
|
|
||||||
|
extern uint32_t Master_frequency ;
|
||||||
|
|
||||||
|
/***************************************************************************/
|
||||||
|
/* ResetHandler */
|
||||||
|
/* */
|
||||||
|
/* This function is used for the C runtime initialisation, */
|
||||||
|
/* for handling the .data and .bss segments. */
|
||||||
|
/***************************************************************************/
|
||||||
|
void ResetHandler (void)
|
||||||
|
{
|
||||||
|
{
|
||||||
|
register uint32_t *pSrc;
|
||||||
|
register uint32_t *pDest;
|
||||||
|
register uint32_t m_freq ;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Call the SystemInit code from CMSIS interface if available.
|
||||||
|
* SystemInit is a week function which can be override
|
||||||
|
* by an external function.
|
||||||
|
*/
|
||||||
|
m_freq = SystemInit();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Set the "Vector Table Offset Register". From the ARM
|
||||||
|
* documentation, we got the following information:
|
||||||
|
*
|
||||||
|
* Use the Vector Table Offset Register to determine:
|
||||||
|
* - if the vector table is in RAM or code memory
|
||||||
|
* - the vector table offset.
|
||||||
|
*/
|
||||||
|
*((uint32_t*)0xE000ED08) = (uint32_t)&_stext;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Copy the initialized data of the ".data" segment
|
||||||
|
* from the flash to the are in the ram.
|
||||||
|
*/
|
||||||
|
pSrc = &_etext;
|
||||||
|
pDest = &_sdata;
|
||||||
|
while(pDest < &_edata)
|
||||||
|
{
|
||||||
|
*pDest++ = *pSrc++;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Clear the ".bss" segment.
|
||||||
|
*/
|
||||||
|
pDest = &_sbss;
|
||||||
|
while(pDest < &_ebss)
|
||||||
|
{
|
||||||
|
*pDest++ = 0;
|
||||||
|
}
|
||||||
|
Master_frequency = m_freq ;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* And now the main function can be called.
|
||||||
|
* Scotty, energie...
|
||||||
|
*/
|
||||||
|
main();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* In case there are problems with the
|
||||||
|
* "warp drive", stop here.
|
||||||
|
*/
|
||||||
|
while(1) {};
|
||||||
|
|
||||||
|
} /* ResetHandler */
|
||||||
|
|
||||||
|
/*** EOF ***/
|
||||||
344
src/ersky9x/sound.cpp
Normal file
344
src/ersky9x/sound.cpp
Normal file
|
|
@ -0,0 +1,344 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* Copyright (c) 2011 by Michael Blandford. All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of the author nor the names of its contributors may
|
||||||
|
* be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||||
|
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||||
|
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************
|
||||||
|
* History:
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#include "AT91SAM3S2.h"
|
||||||
|
#include "core_cm3.h"
|
||||||
|
|
||||||
|
#include "sound.h"
|
||||||
|
|
||||||
|
void start_sound( void ) ;
|
||||||
|
void buzzer_on( void ) ;
|
||||||
|
void buzzer_off( void ) ;
|
||||||
|
void buzzer_sound( uint8_t time ) ;
|
||||||
|
void start_timer1( void ) ;
|
||||||
|
void init_dac( void ) ;
|
||||||
|
extern "C" void DAC_IRQHandler( void ) ;
|
||||||
|
void disp_mem( register uint32_t address ) ;
|
||||||
|
void end_sound( void ) ;
|
||||||
|
void tone_start( register uint32_t time ) ;
|
||||||
|
void tone_stop( void ) ;
|
||||||
|
void init_twi( void ) ;
|
||||||
|
void set_volume( register uint8_t volume ) ;
|
||||||
|
extern "C" void TWI0_IRQHandler (void) ;
|
||||||
|
void audioDefevent( uint8_t e ) ;
|
||||||
|
|
||||||
|
|
||||||
|
extern uint32_t Master_frequency ;
|
||||||
|
|
||||||
|
volatile uint32_t Tone_timer ; // Modified in interrupt routine
|
||||||
|
volatile uint8_t Buzzer_count ;
|
||||||
|
|
||||||
|
// Must NOT be in flash, PDC needs a RAM source.
|
||||||
|
uint16_t Sine_values[] =
|
||||||
|
{
|
||||||
|
2048,2173,2298,2422,2545,2666,2784,2899,3011,3119,
|
||||||
|
3223,3322,3417,3505,3589,3666,3736,3800,3857,3907,
|
||||||
|
3950,3985,4012,4032,4044,4048,4044,4032,4012,3985,
|
||||||
|
3950,3907,3857,3800,3736,3666,3589,3505,3417,3322,
|
||||||
|
3223,3119,3011,2899,2784,2666,2545,2422,2298,2173,
|
||||||
|
2048,1922,1797,1673,1550,1429,1311,1196,1084, 976,
|
||||||
|
872, 773, 678, 590, 506, 429, 359, 295, 238, 188,
|
||||||
|
145, 110, 83, 63, 51, 48, 51, 63, 83, 110,
|
||||||
|
145, 188, 238, 295, 359, 429, 506, 590, 678, 773,
|
||||||
|
872, 976,1084,1196,1311,1429,1550,1673,1797,1922
|
||||||
|
} ;
|
||||||
|
|
||||||
|
// Must NOT be in flash, PDC needs a RAM source.
|
||||||
|
uint16_t Sine_values64[] =
|
||||||
|
{
|
||||||
|
2048,2244,2438,2628,2813,2990,3159,3316,
|
||||||
|
3462,3594,3710,3811,3895,3961,4009,4038,
|
||||||
|
4048,4038,4009,3961,3895,3811,3710,3594,
|
||||||
|
3462,3316,3159,2990,2813,2628,2438,2244,
|
||||||
|
2048,1851,1657,1467,1282,1105, 936, 779,
|
||||||
|
633, 501, 385, 284, 200, 134, 86, 57,
|
||||||
|
48, 57, 86, 134, 200, 284, 385, 501,
|
||||||
|
633, 779, 936,1105,1282,1467,1657,1851
|
||||||
|
} ;
|
||||||
|
|
||||||
|
// Sound routines
|
||||||
|
|
||||||
|
void start_sound()
|
||||||
|
{
|
||||||
|
register Pio *pioptr ;
|
||||||
|
|
||||||
|
start_timer1() ;
|
||||||
|
init_dac() ;
|
||||||
|
init_twi() ;
|
||||||
|
|
||||||
|
pioptr = PIOA ;
|
||||||
|
#ifdef REVB
|
||||||
|
pioptr->PIO_CODR = 0x02000000L ; // Set bit A25 OFF
|
||||||
|
pioptr->PIO_PER = 0x02000000L ; // Enable bit A25 (Stock buzzer)
|
||||||
|
pioptr->PIO_OER = 0x02000000L ; // Set bit A25 as output
|
||||||
|
#else
|
||||||
|
pioptr->PIO_CODR = 0x00010000L ; // Set bit A16 OFF
|
||||||
|
pioptr->PIO_PER = 0x00010000L ; // Enable bit A16 (Stock buzzer)
|
||||||
|
pioptr->PIO_OER = 0x00010000L ; // Set bit A16 as output
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef REVB
|
||||||
|
void buzzer_on()
|
||||||
|
{
|
||||||
|
PIOA->PIO_SODR = 0x02000000L ; // Set bit A25 ON
|
||||||
|
}
|
||||||
|
|
||||||
|
void buzzer_off()
|
||||||
|
{
|
||||||
|
PIOA->PIO_CODR = 0x02000000L ; // Set bit A25 ON
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
void buzzer_on()
|
||||||
|
{
|
||||||
|
PIOA->PIO_SODR = 0x00010000L ; // Set bit A16 ON
|
||||||
|
}
|
||||||
|
|
||||||
|
void buzzer_off()
|
||||||
|
{
|
||||||
|
PIOA->PIO_CODR = 0x00010000L ; // Set bit A16 ON
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void buzzer_sound( uint8_t time )
|
||||||
|
{
|
||||||
|
buzzer_on() ;
|
||||||
|
Buzzer_count = time ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
static uint32_t Frequency ;
|
||||||
|
|
||||||
|
void set_frequency( uint32_t frequency )
|
||||||
|
{
|
||||||
|
register Tc *ptc ;
|
||||||
|
register uint32_t timer ;
|
||||||
|
|
||||||
|
Frequency = frequency ;
|
||||||
|
timer = Master_frequency / (800 * frequency) ; // MCK/8 and 100 000 Hz
|
||||||
|
if ( timer > 65535 )
|
||||||
|
{
|
||||||
|
timer = 65535 ;
|
||||||
|
}
|
||||||
|
if ( timer < 2 )
|
||||||
|
{
|
||||||
|
timer = 2 ;
|
||||||
|
}
|
||||||
|
ptc = TC0 ; // Tc block 0 (TC0-2)
|
||||||
|
ptc->TC_CHANNEL[1].TC_CCR = TC_CCR0_CLKDIS ; // Stop clock
|
||||||
|
ptc->TC_CHANNEL[1].TC_RC = timer ; // 100 000 Hz
|
||||||
|
ptc->TC_CHANNEL[1].TC_RA = timer >> 1 ;
|
||||||
|
ptc->TC_CHANNEL[1].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// Start TIMER1 at 100000Hz, used for DACC trigger
|
||||||
|
void start_timer1()
|
||||||
|
{
|
||||||
|
register Tc *ptc ;
|
||||||
|
register uint32_t timer ;
|
||||||
|
|
||||||
|
// Enable peripheral clock TC0 = bit 23 thru TC5 = bit 28
|
||||||
|
PMC->PMC_PCER0 |= 0x01000000L ; // Enable peripheral clock to TC1
|
||||||
|
|
||||||
|
timer = Master_frequency / 800000 ; // MCK/8 and 100 000 Hz
|
||||||
|
ptc = TC0 ; // Tc block 0 (TC0-2)
|
||||||
|
ptc->TC_BCR = 0 ; // No sync
|
||||||
|
ptc->TC_BMR = 0 ;
|
||||||
|
ptc->TC_CHANNEL[1].TC_CMR = 0x00008000 ; // Waveform mode
|
||||||
|
ptc->TC_CHANNEL[1].TC_RC = timer ; // 100 000 Hz
|
||||||
|
ptc->TC_CHANNEL[1].TC_RA = timer >> 1 ;
|
||||||
|
ptc->TC_CHANNEL[1].TC_CMR = 0x0009C001 ; // 0000 0000 0000 1001 1100 0000 0000 0001
|
||||||
|
// MCK/8, set @ RA, Clear @ RC waveform
|
||||||
|
ptc->TC_CHANNEL[1].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
|
||||||
|
Frequency = 1000 ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
// Configure DAC1 (or DAC0 for REVB)
|
||||||
|
// Not sure why PB14 has not be allocated to the DAC, although it is an EXTRA function
|
||||||
|
// So maybe it is automatically done
|
||||||
|
void init_dac()
|
||||||
|
{
|
||||||
|
register Dacc *dacptr ;
|
||||||
|
|
||||||
|
PMC->PMC_PCER0 |= 0x40000000L ; // Enable peripheral clock to DAC
|
||||||
|
dacptr = DACC ;
|
||||||
|
#ifdef REVB
|
||||||
|
dacptr->DACC_MR = 0x0B000215L ; // 0000 1011 0000 0001 0000 0010 0001 0101
|
||||||
|
#else
|
||||||
|
dacptr->DACC_MR = 0x0B010215L ; // 0000 1011 0000 0001 0000 0010 0001 0101
|
||||||
|
#endif
|
||||||
|
#ifdef REVB
|
||||||
|
dacptr->DACC_CHER = 1 ; // Enable channel 0
|
||||||
|
#else
|
||||||
|
dacptr->DACC_CHER = 2 ; // Enable channel 1
|
||||||
|
#endif
|
||||||
|
dacptr->DACC_CDR = 2048 ; // Half amplitude
|
||||||
|
// Data for PDC must NOT be in flash, PDC needs a RAM source.
|
||||||
|
dacptr->DACC_TPR = (uint32_t) Sine_values ;
|
||||||
|
dacptr->DACC_TNPR = (uint32_t) Sine_values ;
|
||||||
|
dacptr->DACC_TCR = 50 ; // words, 100 16 bit values
|
||||||
|
dacptr->DACC_TNCR = 50 ; // words, 100 16 bit values
|
||||||
|
dacptr->DACC_PTCR = DACC_PTCR_TXTEN ;
|
||||||
|
NVIC_EnableIRQ(DACC_IRQn) ;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern "C" void DAC_IRQHandler()
|
||||||
|
{
|
||||||
|
// Data for PDC must NOT be in flash, PDC needs a RAM source.
|
||||||
|
DACC->DACC_TNPR = (uint32_t) Sine_values ;
|
||||||
|
DACC->DACC_TNCR = 50 ; // words, 100 16 bit values
|
||||||
|
if ( Tone_timer )
|
||||||
|
{
|
||||||
|
if ( --Tone_timer == 0 )
|
||||||
|
{
|
||||||
|
DACC->DACC_IDR = DACC_IDR_ENDTX ;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void end_sound()
|
||||||
|
{
|
||||||
|
DACC->DACC_IDR = DACC_IDR_ENDTX ;
|
||||||
|
NVIC_DisableIRQ(DACC_IRQn) ;
|
||||||
|
TWI0->TWI_IDR = TWI_IDR_TXCOMP ;
|
||||||
|
NVIC_DisableIRQ(TWI0_IRQn) ;
|
||||||
|
PMC->PMC_PCER0 &= ~0x00080000L ; // Disable peripheral clock to TWI0
|
||||||
|
PMC->PMC_PCER0 &= ~0x40000000L ; // Disable peripheral clock to DAC
|
||||||
|
}
|
||||||
|
|
||||||
|
// Time is in milliseconds
|
||||||
|
void tone_start( register uint32_t time )
|
||||||
|
{
|
||||||
|
PMC->PMC_PCER0 |= 0x40000000L ; // Enable peripheral clock to DAC
|
||||||
|
Tone_timer = Frequency * time / 1000 ;
|
||||||
|
DACC->DACC_IER = DACC_IER_ENDTX ;
|
||||||
|
}
|
||||||
|
|
||||||
|
void tone_stop()
|
||||||
|
{
|
||||||
|
DACC->DACC_IDR = DACC_IDR_ENDTX ; // Disable interrupt
|
||||||
|
Tone_timer = 0 ;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
// Set up for volume control (TWI0)
|
||||||
|
// Need PA3 and PA4 set to peripheral A
|
||||||
|
void init_twi()
|
||||||
|
{
|
||||||
|
register Pio *pioptr ;
|
||||||
|
register uint32_t timing ;
|
||||||
|
|
||||||
|
PMC->PMC_PCER0 |= 0x00080000L ; // Enable peripheral clock to TWI0
|
||||||
|
|
||||||
|
/* Configure PIO */
|
||||||
|
pioptr = PIOA ;
|
||||||
|
pioptr->PIO_ABCDSR[0] &= ~0x00000018 ; // Peripheral A
|
||||||
|
pioptr->PIO_ABCDSR[1] &= ~0x00000018 ; // Peripheral A
|
||||||
|
pioptr->PIO_PDR = 0x00000018 ; // Assign to peripheral
|
||||||
|
|
||||||
|
timing = Master_frequency * 5 / 1000000 ; // 5uS high and low
|
||||||
|
timing += 15 - 4 ;
|
||||||
|
timing /= 16 ;
|
||||||
|
timing |= timing << 8 ;
|
||||||
|
|
||||||
|
TWI0->TWI_CWGR = 0x00040000 | timing ; // TWI clock set
|
||||||
|
TWI0->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS ; // Master mode enable
|
||||||
|
TWI0->TWI_MMR = 0x002F0000 ; // Device 5E (>>1) and master is writing
|
||||||
|
NVIC_EnableIRQ(TWI0_IRQn) ;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static int16_t Volume_required ;
|
||||||
|
static const uint8_t Volume_scale[NUM_VOL_LEVELS] =
|
||||||
|
{
|
||||||
|
0, 2, 4, 6, 8, 10, 13, 17, 22, 27, 33, 40,
|
||||||
|
64, 82, 96, 105, 112, 117, 120, 122, 124, 125, 126, 127
|
||||||
|
} ;
|
||||||
|
|
||||||
|
void set_volume( register uint8_t volume )
|
||||||
|
{
|
||||||
|
PMC->PMC_PCER0 |= 0x00080000L ; // Enable peripheral clock to TWI0
|
||||||
|
|
||||||
|
if ( volume >= NUM_VOL_LEVELS )
|
||||||
|
{
|
||||||
|
volume = NUM_VOL_LEVELS - 1 ;
|
||||||
|
}
|
||||||
|
volume = Volume_scale[volume] ;
|
||||||
|
|
||||||
|
__disable_irq() ;
|
||||||
|
if ( TWI0->TWI_IMR & TWI_IMR_TXCOMP )
|
||||||
|
{
|
||||||
|
Volume_required = volume ;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
TWI0->TWI_THR = volume ; // Send data
|
||||||
|
TWI0->TWI_CR = TWI_CR_STOP ; // Stop Tx
|
||||||
|
TWI0->TWI_IER = TWI_IER_TXCOMP ;
|
||||||
|
|
||||||
|
}
|
||||||
|
__enable_irq() ;
|
||||||
|
}
|
||||||
|
|
||||||
|
extern "C" void TWI0_IRQHandler()
|
||||||
|
{
|
||||||
|
if ( Volume_required >= 0 )
|
||||||
|
{
|
||||||
|
TWI0->TWI_THR = Volume_required ; // Send data
|
||||||
|
Volume_required = -1 ;
|
||||||
|
TWI0->TWI_CR = TWI_CR_STOP ; // Stop Tx
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
TWI0->TWI_IDR = TWI_IDR_TXCOMP ;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void audioDefevent(uint8_t e)
|
||||||
|
{
|
||||||
|
buzzer_sound( 4 ) ;
|
||||||
|
// audio.event(e,BEEP_DEFAULT_FREQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
83
src/ersky9x/sound.h
Normal file
83
src/ersky9x/sound.h
Normal file
|
|
@ -0,0 +1,83 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* Copyright (c) 2011 by Michael Blandford. All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of the author nor the names of its contributors may
|
||||||
|
* be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||||
|
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||||
|
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************
|
||||||
|
* History:
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/* make sure the defines below always go in numeric order */
|
||||||
|
#define AUDIO_TADA (0)
|
||||||
|
#define AUDIO_WARNING1 (1)
|
||||||
|
#define AUDIO_WARNING2 (2)
|
||||||
|
#define AUDIO_WARNING3 (3)
|
||||||
|
#define AUDIO_ERROR (4)
|
||||||
|
#define AUDIO_KEYPAD_UP (5)
|
||||||
|
#define AUDIO_KEYPAD_DOWN (6)
|
||||||
|
#define AUDIO_TRIM_MOVE (7)
|
||||||
|
#define AUDIO_TRIM_MIDDLE (8)
|
||||||
|
#define AUDIO_MENUS (9)
|
||||||
|
#define AUDIO_POT_STICK_MIDDLE (10)
|
||||||
|
#define AUDIO_MIX_WARNING_1 (11)
|
||||||
|
#define AUDIO_MIX_WARNING_2 (12)
|
||||||
|
#define AUDIO_MIX_WARNING_3 (13)
|
||||||
|
#define AUDIO_TIMER_30 (14)
|
||||||
|
#define AUDIO_TIMER_20 (15)
|
||||||
|
#define AUDIO_TIMER_10 (16)
|
||||||
|
#define AUDIO_TIMER_LT3 (17)
|
||||||
|
#define AUDIO_INACTIVITY (18)
|
||||||
|
#define AUDIO_TX_BATTERY_LOW (19)
|
||||||
|
|
||||||
|
|
||||||
|
#define NUM_VOL_LEVELS 24
|
||||||
|
|
||||||
|
extern volatile uint8_t Buzzer_count ;
|
||||||
|
|
||||||
|
|
||||||
|
extern void start_sound( void ) ;
|
||||||
|
extern void buzzer_on( void ) ;
|
||||||
|
extern void buzzer_off( void ) ;
|
||||||
|
extern void buzzer_sound( uint8_t time ) ;
|
||||||
|
extern void set_frequency( uint32_t frequency ) ;
|
||||||
|
extern void start_timer1( void ) ;
|
||||||
|
extern void init_dac( void ) ;
|
||||||
|
extern "C" void DAC_IRQHandler( void ) ;
|
||||||
|
extern void end_sound( void ) ;
|
||||||
|
extern void tone_start( register uint32_t time ) ;
|
||||||
|
extern void tone_stop( void ) ;
|
||||||
|
extern void init_twi( void ) ;
|
||||||
|
extern void set_volume( register uint8_t volume ) ;
|
||||||
|
extern "C" void TWI0_IRQHandler (void) ;
|
||||||
|
extern void audioDefevent( uint8_t e ) ;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
197
src/ersky9x/vectors_sam3s.c
Normal file
197
src/ersky9x/vectors_sam3s.c
Normal file
|
|
@ -0,0 +1,197 @@
|
||||||
|
/****************************************************************************
|
||||||
|
* Copyright (c) 2011 by Michael Fischer. All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of the author nor the names of its contributors may
|
||||||
|
* be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||||
|
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||||
|
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
****************************************************************************
|
||||||
|
* History:
|
||||||
|
*
|
||||||
|
* 22.05.2011 mifi First Version for the SAM3S4C
|
||||||
|
****************************************************************************/
|
||||||
|
#define __VECTORS_SAM3S_C__
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: All extern Data */
|
||||||
|
/*=========================================================================*/
|
||||||
|
extern unsigned long _estack;
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: Prototypes */
|
||||||
|
/*=========================================================================*/
|
||||||
|
void ResetHandler(void);
|
||||||
|
|
||||||
|
void NMI_Handler (void) __attribute__((weak));
|
||||||
|
void HardFault_Handler (void) __attribute__((weak));
|
||||||
|
void MemManage_Handler (void) __attribute__((weak));
|
||||||
|
void BusFault_Handler (void) __attribute__((weak));
|
||||||
|
void UsageFault_Handler (void) __attribute__((weak));
|
||||||
|
void SVC_Handler (void) __attribute__((weak));
|
||||||
|
void DebugMon_Handler (void) __attribute__((weak));
|
||||||
|
void PendSV_Handler (void) __attribute__((weak));
|
||||||
|
void SysTick_Handler (void) __attribute__((weak));
|
||||||
|
|
||||||
|
void SUPC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void RSTC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void RTC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void RTT_IRQHandler (void) __attribute__((weak));
|
||||||
|
void WDT_IRQHandler (void) __attribute__((weak));
|
||||||
|
void PMC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void EEFC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void UART0_IRQHandler (void) __attribute__((weak));
|
||||||
|
void UART1_IRQHandler (void) __attribute__((weak));
|
||||||
|
void SMC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void PIOA_IRQHandler (void) __attribute__((weak));
|
||||||
|
void PIOB_IRQHandler (void) __attribute__((weak));
|
||||||
|
void PIOC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void USART0_IRQHandler (void) __attribute__((weak));
|
||||||
|
void USART1_IRQHandler (void) __attribute__((weak));
|
||||||
|
void MCI_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TWI0_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TWI1_IRQHandler (void) __attribute__((weak));
|
||||||
|
void SPI_IRQHandler (void) __attribute__((weak));
|
||||||
|
void SSC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC0_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC1_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC2_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC3_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC4_IRQHandler (void) __attribute__((weak));
|
||||||
|
void TC5_IRQHandler (void) __attribute__((weak));
|
||||||
|
void ADC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void DAC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void PWM_IRQHandler (void) __attribute__((weak));
|
||||||
|
void CRCCU_IRQHandler (void) __attribute__((weak));
|
||||||
|
void ACC_IRQHandler (void) __attribute__((weak));
|
||||||
|
void USBD_IRQHandler (void) __attribute__((weak));
|
||||||
|
|
||||||
|
/*=========================================================================*/
|
||||||
|
/* DEFINE: All code exported */
|
||||||
|
/*=========================================================================*/
|
||||||
|
/*
|
||||||
|
* This is our vector table.
|
||||||
|
*/
|
||||||
|
__attribute__ ((section(".vectors"), used))
|
||||||
|
void (* const gVectors[])(void) =
|
||||||
|
{
|
||||||
|
(void (*)(void))((unsigned long)&_estack),
|
||||||
|
ResetHandler,
|
||||||
|
NMI_Handler,
|
||||||
|
HardFault_Handler,
|
||||||
|
MemManage_Handler,
|
||||||
|
BusFault_Handler,
|
||||||
|
UsageFault_Handler,
|
||||||
|
0, 0, 0, 0,
|
||||||
|
SVC_Handler,
|
||||||
|
DebugMon_Handler,
|
||||||
|
0,
|
||||||
|
PendSV_Handler,
|
||||||
|
SysTick_Handler,
|
||||||
|
|
||||||
|
SUPC_IRQHandler, /* 0 SUPPLY CONTROLLER */
|
||||||
|
RSTC_IRQHandler, /* 1 RESET CONTROLLER */
|
||||||
|
RTC_IRQHandler, /* 2 REAL TIME CLOCK */
|
||||||
|
RTT_IRQHandler, /* 3 REAL TIME TIMER */
|
||||||
|
WDT_IRQHandler, /* 4 WATCHDOG TIMER */
|
||||||
|
PMC_IRQHandler, /* 5 PMC */
|
||||||
|
EEFC_IRQHandler, /* 6 EEFC */
|
||||||
|
0, /* 7 Reserved */
|
||||||
|
UART0_IRQHandler, /* 8 UART0 */
|
||||||
|
UART1_IRQHandler, /* 9 UART1 */
|
||||||
|
SMC_IRQHandler, /* 10 SMC */
|
||||||
|
PIOA_IRQHandler, /* 11 Parallel IO Controller A */
|
||||||
|
PIOB_IRQHandler, /* 12 Parallel IO Controller B */
|
||||||
|
PIOC_IRQHandler, /* 13 Parallel IO Controller C */
|
||||||
|
USART0_IRQHandler, /* 14 USART 0 */
|
||||||
|
USART1_IRQHandler, /* 15 USART 1 */
|
||||||
|
0, /* 16 Reserved */
|
||||||
|
0, /* 17 Reserved */
|
||||||
|
MCI_IRQHandler, /* 18 MCI */
|
||||||
|
TWI0_IRQHandler, /* 19 TWI 0 */
|
||||||
|
TWI1_IRQHandler, /* 20 TWI 1 */
|
||||||
|
SPI_IRQHandler, /* 21 SPI */
|
||||||
|
SSC_IRQHandler, /* 22 SSC */
|
||||||
|
TC0_IRQHandler, /* 23 Timer Counter 0 */
|
||||||
|
TC1_IRQHandler, /* 24 Timer Counter 1 */
|
||||||
|
TC2_IRQHandler, /* 25 Timer Counter 2 */
|
||||||
|
TC3_IRQHandler, /* 26 Timer Counter 3 */
|
||||||
|
TC4_IRQHandler, /* 27 Timer Counter 4 */
|
||||||
|
TC5_IRQHandler, /* 28 Timer Counter 5 */
|
||||||
|
ADC_IRQHandler, /* 29 ADC controller */
|
||||||
|
DAC_IRQHandler, /* 30 DAC controller */
|
||||||
|
PWM_IRQHandler, /* 31 PWM */
|
||||||
|
CRCCU_IRQHandler, /* 32 CRC Calculation Unit */
|
||||||
|
ACC_IRQHandler, /* 33 Analog Comparator */
|
||||||
|
USBD_IRQHandler, /* 34 USB Device Port */
|
||||||
|
0 /* 35 not used */
|
||||||
|
}; /* gVectors */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* And here are the weak interrupt handlers.
|
||||||
|
*/
|
||||||
|
void NMI_Handler (void) { while(1); }
|
||||||
|
void HardFault_Handler (void) { while(1); }
|
||||||
|
void MemManage_Handler (void) { while(1); }
|
||||||
|
void BusFault_Handler (void) { while(1); }
|
||||||
|
void UsageFault_Handler (void) { while(1); }
|
||||||
|
void SVC_Handler (void) { while(1); }
|
||||||
|
void DebugMon_Handler (void) { while(1); }
|
||||||
|
void PendSV_Handler (void) { while(1); }
|
||||||
|
void SysTick_Handler (void) { while(1); }
|
||||||
|
|
||||||
|
void SUPC_IRQHandler (void) { while(1); }
|
||||||
|
void RSTC_IRQHandler (void) { while(1); }
|
||||||
|
void RTC_IRQHandler (void) { while(1); }
|
||||||
|
void RTT_IRQHandler (void) { while(1); }
|
||||||
|
void WDT_IRQHandler (void) { while(1); }
|
||||||
|
void PMC_IRQHandler (void) { while(1); }
|
||||||
|
void EEFC_IRQHandler (void) { while(1); }
|
||||||
|
void UART0_IRQHandler (void) { while(1); }
|
||||||
|
void UART1_IRQHandler (void) { while(1); }
|
||||||
|
void SMC_IRQHandler (void) { while(1); }
|
||||||
|
void PIOA_IRQHandler (void) { while(1); }
|
||||||
|
void PIOB_IRQHandler (void) { while(1); }
|
||||||
|
void PIOC_IRQHandler (void) { while(1); }
|
||||||
|
void USART0_IRQHandler (void) { while(1); }
|
||||||
|
void USART1_IRQHandler (void) { while(1); }
|
||||||
|
void MCI_IRQHandler (void) { while(1); }
|
||||||
|
void TWI0_IRQHandler (void) { while(1); }
|
||||||
|
void TWI1_IRQHandler (void) { while(1); }
|
||||||
|
void SPI_IRQHandler (void) { while(1); }
|
||||||
|
void SSC_IRQHandler (void) { while(1); }
|
||||||
|
void TC0_IRQHandler (void) { while(1); }
|
||||||
|
void TC1_IRQHandler (void) { while(1); }
|
||||||
|
void TC2_IRQHandler (void) { while(1); }
|
||||||
|
void TC3_IRQHandler (void) { while(1); }
|
||||||
|
void TC4_IRQHandler (void) { while(1); }
|
||||||
|
void TC5_IRQHandler (void) { while(1); }
|
||||||
|
void ADC_IRQHandler (void) { while(1); }
|
||||||
|
void DAC_IRQHandler (void) { while(1); }
|
||||||
|
void PWM_IRQHandler (void) { while(1); }
|
||||||
|
void CRCCU_IRQHandler (void) { while(1); }
|
||||||
|
void ACC_IRQHandler (void) { while(1); }
|
||||||
|
void USBD_IRQHandler (void) { while(1); }
|
||||||
|
|
||||||
|
/*** EOF ***/
|
||||||
|
|
@ -31,7 +31,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "menus.h"
|
#include "open9x.h"
|
||||||
|
|
||||||
const pm_uchar sticks[] PROGMEM = {
|
const pm_uchar sticks[] PROGMEM = {
|
||||||
#include "sticks.lbm"
|
#include "sticks.lbm"
|
||||||
|
|
|
||||||
|
|
@ -31,7 +31,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "menus.h"
|
#include "open9x.h"
|
||||||
|
|
||||||
#define BOX_WIDTH 23
|
#define BOX_WIDTH 23
|
||||||
#define BAR_HEIGHT (BOX_WIDTH-1l)
|
#define BAR_HEIGHT (BOX_WIDTH-1l)
|
||||||
|
|
|
||||||
|
|
@ -31,10 +31,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
#include "open9x.h"
|
#include "open9x.h"
|
||||||
#include "templates.h"
|
|
||||||
#include "menus.h"
|
|
||||||
|
|
||||||
int16_t calibratedStick[NUM_STICKS+NUM_POTS];
|
int16_t calibratedStick[NUM_STICKS+NUM_POTS];
|
||||||
uint8_t s_pgOfs;
|
uint8_t s_pgOfs;
|
||||||
|
|
|
||||||
|
|
@ -34,8 +34,6 @@
|
||||||
#ifndef menus_h
|
#ifndef menus_h
|
||||||
#define menus_h
|
#define menus_h
|
||||||
|
|
||||||
#include "open9x.h"
|
|
||||||
|
|
||||||
#define NO_HI_LEN 25
|
#define NO_HI_LEN 25
|
||||||
|
|
||||||
#define RESX 1024
|
#define RESX 1024
|
||||||
|
|
|
||||||
|
|
@ -31,8 +31,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "menus.h"
|
#include "open9x.h"
|
||||||
#include "templates.h"
|
|
||||||
|
|
||||||
#define WCHART 32
|
#define WCHART 32
|
||||||
#define X0 (128-WCHART-2)
|
#define X0 (128-WCHART-2)
|
||||||
|
|
@ -153,15 +152,20 @@ static uint8_t s_copyMode = 0;
|
||||||
static int8_t s_copySrcRow;
|
static int8_t s_copySrcRow;
|
||||||
static int8_t s_copyTgtOfs;
|
static int8_t s_copyTgtOfs;
|
||||||
|
|
||||||
|
// TODO add ARM code here...
|
||||||
void menuProcModelSelect(uint8_t event)
|
void menuProcModelSelect(uint8_t event)
|
||||||
{
|
{
|
||||||
TITLE(STR_MENUMODELSEL);
|
TITLE(STR_MENUMODELSEL);
|
||||||
|
|
||||||
|
#if !defined(PCBARM)
|
||||||
// flush eeprom write
|
// flush eeprom write
|
||||||
eeFlush();
|
eeFlush();
|
||||||
|
#endif
|
||||||
|
|
||||||
if (s_confirmation) {
|
if (s_confirmation) {
|
||||||
|
#if !defined(PCBARM)
|
||||||
EFile::rm(FILE_MODEL(m_posVert)); // delete file
|
EFile::rm(FILE_MODEL(m_posVert)); // delete file
|
||||||
|
#endif
|
||||||
s_confirmation = 0;
|
s_confirmation = 0;
|
||||||
s_copyMode = 0;
|
s_copyMode = 0;
|
||||||
}
|
}
|
||||||
|
|
@ -169,10 +173,12 @@ void menuProcModelSelect(uint8_t event)
|
||||||
uint8_t _event = (s_warning ? 0 : event);
|
uint8_t _event = (s_warning ? 0 : event);
|
||||||
uint8_t _event_ = (IS_RE1_EVT(_event) ? 0 : _event);
|
uint8_t _event_ = (IS_RE1_EVT(_event) ? 0 : _event);
|
||||||
|
|
||||||
|
#if !defined(PCBARM)
|
||||||
if (s_copyMode || !EFile::exists(FILE_MODEL(g_eeGeneral.currModel))) {
|
if (s_copyMode || !EFile::exists(FILE_MODEL(g_eeGeneral.currModel))) {
|
||||||
if ((_event & 0x1f) == KEY_EXIT)
|
if ((_event & 0x1f) == KEY_EXIT)
|
||||||
_event_ -= KEY_EXIT;
|
_event_ -= KEY_EXIT;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
int8_t oldSub = m_posVert;
|
int8_t oldSub = m_posVert;
|
||||||
if (!check_submenu_simple(_event_, MAX_MODELS-1)) return;
|
if (!check_submenu_simple(_event_, MAX_MODELS-1)) return;
|
||||||
|
|
@ -199,11 +205,13 @@ void menuProcModelSelect(uint8_t event)
|
||||||
s_editMode = -1;
|
s_editMode = -1;
|
||||||
break;
|
break;
|
||||||
case EVT_KEY_LONG(KEY_EXIT):
|
case EVT_KEY_LONG(KEY_EXIT):
|
||||||
|
#if !defined(PCBARM)
|
||||||
if (s_copyMode && s_copyTgtOfs == 0 && g_eeGeneral.currModel != sub && EFile::exists(FILE_MODEL(sub))) {
|
if (s_copyMode && s_copyTgtOfs == 0 && g_eeGeneral.currModel != sub && EFile::exists(FILE_MODEL(sub))) {
|
||||||
s_warning = STR_DELETEMODEL;
|
s_warning = STR_DELETEMODEL;
|
||||||
killEvents(_event);
|
killEvents(_event);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
// no break
|
// no break
|
||||||
case EVT_KEY_BREAK(KEY_EXIT):
|
case EVT_KEY_BREAK(KEY_EXIT):
|
||||||
if (s_copyMode) {
|
if (s_copyMode) {
|
||||||
|
|
@ -229,15 +237,19 @@ void menuProcModelSelect(uint8_t event)
|
||||||
uint8_t cur = (16 + sub + s_copyTgtOfs) % 16;
|
uint8_t cur = (16 + sub + s_copyTgtOfs) % 16;
|
||||||
|
|
||||||
if (s_copyMode == COPY_MODE) {
|
if (s_copyMode == COPY_MODE) {
|
||||||
|
#if !defined(PCBARM)
|
||||||
if (!theFile.copy(FILE_MODEL(cur), FILE_MODEL(s_copySrcRow)))
|
if (!theFile.copy(FILE_MODEL(cur), FILE_MODEL(s_copySrcRow)))
|
||||||
cur = sub;
|
cur = sub;
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
s_copySrcRow = g_eeGeneral.currModel; // to update the currModel value
|
s_copySrcRow = g_eeGeneral.currModel; // to update the currModel value
|
||||||
while (sub != cur) {
|
while (sub != cur) {
|
||||||
uint8_t src = cur;
|
uint8_t src = cur;
|
||||||
cur = (s_copyTgtOfs > 0 ? cur+15 : cur+1) % 16;
|
cur = (s_copyTgtOfs > 0 ? cur+15 : cur+1) % 16;
|
||||||
|
#if !defined(PCBARM)
|
||||||
EFile::swap(FILE_MODEL(src), FILE_MODEL(cur));
|
EFile::swap(FILE_MODEL(src), FILE_MODEL(cur));
|
||||||
|
#endif
|
||||||
if (src == s_copySrcRow)
|
if (src == s_copySrcRow)
|
||||||
s_copySrcRow = cur;
|
s_copySrcRow = cur;
|
||||||
else if (cur == s_copySrcRow)
|
else if (cur == s_copySrcRow)
|
||||||
|
|
@ -269,9 +281,11 @@ void menuProcModelSelect(uint8_t event)
|
||||||
killEvents(event);
|
killEvents(event);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
#if !defined(PCBARM)
|
||||||
else if (EFile::exists(FILE_MODEL(sub))) {
|
else if (EFile::exists(FILE_MODEL(sub))) {
|
||||||
s_copyMode = (s_copyMode == COPY_MODE ? MOVE_MODE : COPY_MODE);
|
s_copyMode = (s_copyMode == COPY_MODE ? MOVE_MODE : COPY_MODE);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
break;
|
break;
|
||||||
case EVT_KEY_FIRST(KEY_LEFT):
|
case EVT_KEY_FIRST(KEY_LEFT):
|
||||||
case EVT_KEY_FIRST(KEY_RIGHT):
|
case EVT_KEY_FIRST(KEY_RIGHT):
|
||||||
|
|
@ -309,7 +323,9 @@ void menuProcModelSelect(uint8_t event)
|
||||||
}
|
}
|
||||||
|
|
||||||
lcd_puts(9*FW-(LEN_FREE-4)*FW, 0, STR_FREE);
|
lcd_puts(9*FW-(LEN_FREE-4)*FW, 0, STR_FREE);
|
||||||
|
#if !defined(PCBARM)
|
||||||
lcd_outdezAtt( 17*FW, 0, EeFsGetFree(),0);
|
lcd_outdezAtt( 17*FW, 0, EeFsGetFree(),0);
|
||||||
|
#endif
|
||||||
|
|
||||||
DisplayScreenIndex(e_ModelSelect, DIM(menuTabModel), (sub == g_eeGeneral.currModel) ? INVERS : 0);
|
DisplayScreenIndex(e_ModelSelect, DIM(menuTabModel), (sub == g_eeGeneral.currModel) ? INVERS : 0);
|
||||||
|
|
||||||
|
|
@ -341,12 +357,14 @@ void menuProcModelSelect(uint8_t event)
|
||||||
|
|
||||||
k %= 16;
|
k %= 16;
|
||||||
|
|
||||||
|
#if !defined(PCBARM)
|
||||||
if (EFile::exists(FILE_MODEL(k))) {
|
if (EFile::exists(FILE_MODEL(k))) {
|
||||||
uint16_t size = eeLoadModelName(k, reusableBuffer.model_name);
|
uint16_t size = eeLoadModelName(k, reusableBuffer.model_name);
|
||||||
putsModelName(4*FW, y, reusableBuffer.model_name, k, 0);
|
putsModelName(4*FW, y, reusableBuffer.model_name, k, 0);
|
||||||
lcd_outdezAtt(20*FW, y, size, 0);
|
lcd_outdezAtt(20*FW, y, size, 0);
|
||||||
if (k==g_eeGeneral.currModel && (s_copySrcRow<0 || i+s_pgOfs!=sub)) lcd_putc(1, y, '*');
|
if (k==g_eeGeneral.currModel && (s_copySrcRow<0 || i+s_pgOfs!=sub)) lcd_putc(1, y, '*');
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
if (s_copyMode && sub==i+s_pgOfs) {
|
if (s_copyMode && sub==i+s_pgOfs) {
|
||||||
lcd_filled_rect(9, y, DISPLAY_W-1-9, 7);
|
lcd_filled_rect(9, y, DISPLAY_W-1-9, 7);
|
||||||
|
|
|
||||||
|
|
@ -229,7 +229,7 @@ enum Functions {
|
||||||
FUNC_PLAY_SOMO,
|
FUNC_PLAY_SOMO,
|
||||||
#endif
|
#endif
|
||||||
FUNC_RESET,
|
FUNC_RESET,
|
||||||
#if defined(FRSKY_HUB) or defined(WS_HOW_HIGH)
|
#if defined(FRSKY_HUB) || defined(WS_HOW_HIGH)
|
||||||
FUNC_VARIO,
|
FUNC_VARIO,
|
||||||
#endif
|
#endif
|
||||||
#ifdef LOGS
|
#ifdef LOGS
|
||||||
|
|
@ -409,6 +409,12 @@ enum Dsm2Variants {
|
||||||
DSM2_DSMX
|
DSM2_DSMX
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#ifdef MAVLINK
|
||||||
|
#define EXTDATA MavlinkData mavlink
|
||||||
|
#else
|
||||||
|
#define EXTDATA FrSkyData frsky
|
||||||
|
#endif
|
||||||
|
|
||||||
PACK(typedef struct t_ModelData {
|
PACK(typedef struct t_ModelData {
|
||||||
char name[10]; // 10 must be first for eeLoadModelName
|
char name[10]; // 10 must be first for eeLoadModelName
|
||||||
TimerData timers[MAX_TIMERS];
|
TimerData timers[MAX_TIMERS];
|
||||||
|
|
@ -432,11 +438,9 @@ PACK(typedef struct t_ModelData {
|
||||||
FuncSwData funcSw[NUM_FSW];
|
FuncSwData funcSw[NUM_FSW];
|
||||||
SwashRingData swashR;
|
SwashRingData swashR;
|
||||||
PhaseData phaseData[MAX_PHASES];
|
PhaseData phaseData[MAX_PHASES];
|
||||||
#ifdef MAVLINK
|
|
||||||
MavlinkData mavlink;
|
EXTDATA;
|
||||||
#else
|
|
||||||
FrSkyData frsky;
|
|
||||||
#endif
|
|
||||||
int8_t ppmFrameLength; // 0=22.5ms (10ms-30ms) 0.5msec increments
|
int8_t ppmFrameLength; // 0=22.5ms (10ms-30ms) 0.5msec increments
|
||||||
uint8_t thrTraceSrc;
|
uint8_t thrTraceSrc;
|
||||||
uint8_t modelId;
|
uint8_t modelId;
|
||||||
|
|
|
||||||
|
|
@ -129,6 +129,75 @@ LimitData *limitaddress(uint8_t idx)
|
||||||
return &g_model.limitData[idx];
|
return &g_model.limitData[idx];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void generalDefault()
|
||||||
|
{
|
||||||
|
memset(&g_eeGeneral,0,sizeof(g_eeGeneral));
|
||||||
|
g_eeGeneral.myVers = EEPROM_VER;
|
||||||
|
g_eeGeneral.contrast = 25;
|
||||||
|
g_eeGeneral.vBatWarn = 90;
|
||||||
|
for (int i = 0; i < 7; ++i) {
|
||||||
|
g_eeGeneral.calibMid[i] = 0x200;
|
||||||
|
g_eeGeneral.calibSpanNeg[i] = 0x180;
|
||||||
|
g_eeGeneral.calibSpanPos[i] = 0x180;
|
||||||
|
}
|
||||||
|
g_eeGeneral.chkSum = (0x200 * 7) + (0x180 * 5);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t evalChkSum()
|
||||||
|
{
|
||||||
|
uint16_t sum=0;
|
||||||
|
for (int i=0; i<12;i++)
|
||||||
|
sum += g_eeGeneral.calibMid[i];
|
||||||
|
return sum;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifndef TEMPLATES
|
||||||
|
inline void applyDefaultTemplate()
|
||||||
|
{
|
||||||
|
for (int i=0; i<NUM_STICKS; i++) {
|
||||||
|
MixData *md = mixaddress(i);
|
||||||
|
md->destCh = i;
|
||||||
|
md->weight = 100;
|
||||||
|
md->srcRaw = channel_order(i+1);
|
||||||
|
}
|
||||||
|
|
||||||
|
STORE_MODELVARS;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void modelDefault(uint8_t id)
|
||||||
|
{
|
||||||
|
memset(&g_model, 0, sizeof(g_model));
|
||||||
|
applyDefaultTemplate();
|
||||||
|
}
|
||||||
|
|
||||||
|
void resetProto()
|
||||||
|
{
|
||||||
|
#if defined(DSM2_SERIAL)
|
||||||
|
if (g_model.protocol == PROTO_DSM2) {
|
||||||
|
cli();
|
||||||
|
#if defined(FRSKY)
|
||||||
|
DSM2_Init();
|
||||||
|
#endif
|
||||||
|
sei();
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
cli();
|
||||||
|
#if defined(FRSKY)
|
||||||
|
FRSKY_Init();
|
||||||
|
#else
|
||||||
|
DSM2_Done();
|
||||||
|
#endif
|
||||||
|
sei();
|
||||||
|
#if defined(FRSKY)
|
||||||
|
FRSKY_setModelAlarms();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#elif defined(FRSKY)
|
||||||
|
FRSKY_setModelAlarms();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
int16_t intpol(int16_t x, uint8_t idx) // -100, -75, -50, -25, 0 ,25 ,50, 75, 100
|
int16_t intpol(int16_t x, uint8_t idx) // -100, -75, -50, -25, 0 ,25 ,50, 75, 100
|
||||||
{
|
{
|
||||||
#define D9 (RESX * 2 / 8)
|
#define D9 (RESX * 2 / 8)
|
||||||
|
|
@ -572,6 +641,7 @@ void doSplash()
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if !defined(PCBARM)
|
||||||
void checkLowEEPROM()
|
void checkLowEEPROM()
|
||||||
{
|
{
|
||||||
if(g_eeGeneral.disableMemoryWarning) return;
|
if(g_eeGeneral.disableMemoryWarning) return;
|
||||||
|
|
@ -580,6 +650,7 @@ void checkLowEEPROM()
|
||||||
alert(STR_EEPROMLOWMEM);
|
alert(STR_EEPROMLOWMEM);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
void alertMessages( const pm_char * s, const pm_char * t )
|
void alertMessages( const pm_char * s, const pm_char * t )
|
||||||
{
|
{
|
||||||
|
|
@ -949,7 +1020,7 @@ uint16_t g_vbat100mV = 0;
|
||||||
volatile uint8_t tick10ms = 0;
|
volatile uint8_t tick10ms = 0;
|
||||||
uint16_t g_LightOffCounter;
|
uint16_t g_LightOffCounter;
|
||||||
|
|
||||||
#if not defined(PCBARM)
|
#if !defined(PCBARM)
|
||||||
FORCEINLINE bool checkSlaveMode()
|
FORCEINLINE bool checkSlaveMode()
|
||||||
{
|
{
|
||||||
// no power -> only phone jack = slave mode
|
// no power -> only phone jack = slave mode
|
||||||
|
|
@ -1531,12 +1602,14 @@ void perMain()
|
||||||
sei();
|
sei();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if !defined(PCBARM)
|
||||||
if (!eeprom_buffer_size) {
|
if (!eeprom_buffer_size) {
|
||||||
if (theFile.isWriting())
|
if (theFile.isWriting())
|
||||||
theFile.nextWriteStep();
|
theFile.nextWriteStep();
|
||||||
else if (s_eeDirtyMsk)
|
else if (s_eeDirtyMsk)
|
||||||
eeCheck();
|
eeCheck();
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
if (!tick10ms) return; //make sure the rest happen only every 10ms.
|
if (!tick10ms) return; //make sure the rest happen only every 10ms.
|
||||||
|
|
||||||
|
|
@ -1824,7 +1897,7 @@ void perMain()
|
||||||
int16_t g_ppmIns[8];
|
int16_t g_ppmIns[8];
|
||||||
uint8_t ppmInState = 0; //0=unsync 1..8= wait for value i-1
|
uint8_t ppmInState = 0; //0=unsync 1..8= wait for value i-1
|
||||||
|
|
||||||
#if not defined(SIMU) and not defined(PCBARM)
|
#if !defined(SIMU) && !defined(PCBARM)
|
||||||
|
|
||||||
volatile uint8_t g_tmr16KHz; //continuous timer 16ms (16MHz/1024/256) -- 8-bit counter overflow
|
volatile uint8_t g_tmr16KHz; //continuous timer 16ms (16MHz/1024/256) -- 8-bit counter overflow
|
||||||
#if defined (PCBV4)
|
#if defined (PCBV4)
|
||||||
|
|
|
||||||
30
src/open9x.h
30
src/open9x.h
|
|
@ -31,8 +31,8 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef gruvin9x_h
|
#ifndef open9x_h
|
||||||
#define gruvin9x_h
|
#define open9x_h
|
||||||
|
|
||||||
#define MAJ_VERS 2
|
#define MAJ_VERS 2
|
||||||
#define MIN_VERS 00
|
#define MIN_VERS 00
|
||||||
|
|
@ -78,17 +78,25 @@ extern void board_init();
|
||||||
#include <avr/wdt.h>
|
#include <avr/wdt.h>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include "file.h"
|
|
||||||
#include "lcd.h"
|
|
||||||
#include "myeeprom.h"
|
#include "myeeprom.h"
|
||||||
|
|
||||||
#if not defined(SIMU)
|
#if defined(PCBARM)
|
||||||
|
#include "eeprom_arm.h"
|
||||||
|
#else
|
||||||
|
#include "eeprom_avr.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "lcd.h"
|
||||||
|
#include "menus.h"
|
||||||
|
#ifdef TEMPLATES
|
||||||
|
#include "templates.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(SIMU)
|
||||||
#define assert(x)
|
#define assert(x)
|
||||||
#define printf printf_not_allowed
|
#define printf printf_not_allowed
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
extern RlcFile theFile; //used for any file operation
|
|
||||||
|
|
||||||
// G: The following comments relate to the original stock PCB only
|
// G: The following comments relate to the original stock PCB only
|
||||||
//
|
//
|
||||||
// elev thr
|
// elev thr
|
||||||
|
|
@ -456,6 +464,8 @@ uint8_t keyDown();
|
||||||
bool keyState(EnumKeys enuk);
|
bool keyState(EnumKeys enuk);
|
||||||
void readKeysAndTrims();
|
void readKeysAndTrims();
|
||||||
|
|
||||||
|
uint16_t evalChkSum();
|
||||||
|
|
||||||
/// Gibt Alarm Maske auf lcd aus.
|
/// Gibt Alarm Maske auf lcd aus.
|
||||||
/// Die Maske wird so lange angezeigt bis eine beliebige Taste gedrueckt wird.
|
/// Die Maske wird so lange angezeigt bis eine beliebige Taste gedrueckt wird.
|
||||||
void alert(const pm_char * s, bool defaults=false);
|
void alert(const pm_char * s, bool defaults=false);
|
||||||
|
|
@ -603,13 +613,15 @@ uint16_t isqrt32(uint32_t n);
|
||||||
/// eeCheck ins EEPROM zurueckgeschrieben.
|
/// eeCheck ins EEPROM zurueckgeschrieben.
|
||||||
void eeWriteBlockCmp(const void *i_pointer_ram, uint16_t i_pointer_eeprom, size_t size);
|
void eeWriteBlockCmp(const void *i_pointer_ram, uint16_t i_pointer_eeprom, size_t size);
|
||||||
void eeDirty(uint8_t msk);
|
void eeDirty(uint8_t msk);
|
||||||
inline void eeFlush() { theFile.flush(); }
|
|
||||||
void eeCheck(bool immediately=false);
|
void eeCheck(bool immediately=false);
|
||||||
void eeReadAll();
|
void eeReadAll();
|
||||||
bool eeModelExists(uint8_t id);
|
bool eeModelExists(uint8_t id);
|
||||||
uint16_t eeLoadModelName(uint8_t id, char *name);
|
uint16_t eeLoadModelName(uint8_t id, char *name);
|
||||||
void eeLoadModel(uint8_t id);
|
void eeLoadModel(uint8_t id);
|
||||||
int8_t eeFindEmptyModel(uint8_t id, bool down);
|
int8_t eeFindEmptyModel(uint8_t id, bool down);
|
||||||
|
void generalDefault();
|
||||||
|
void modelDefault(uint8_t id);
|
||||||
|
void resetProto();
|
||||||
|
|
||||||
extern inline int16_t calc100toRESX(int8_t x)
|
extern inline int16_t calc100toRESX(int8_t x)
|
||||||
{
|
{
|
||||||
|
|
@ -771,7 +783,9 @@ extern uint16_t jeti_keys;
|
||||||
// Re-useable byte array to save having multiple buffers
|
// Re-useable byte array to save having multiple buffers
|
||||||
union ReusableBuffer
|
union ReusableBuffer
|
||||||
{
|
{
|
||||||
|
#if !defined(PCBARM)
|
||||||
uint8_t eefs_buffer[BLOCKS]; // used by EeFsck
|
uint8_t eefs_buffer[BLOCKS]; // used by EeFsck
|
||||||
|
#endif
|
||||||
|
|
||||||
char model_name[sizeof(g_model.name)]; // used by menuProcModelSelect
|
char model_name[sizeof(g_model.name)]; // used by menuProcModelSelect
|
||||||
|
|
||||||
|
|
|
||||||
225
src/pers.cpp
225
src/pers.cpp
|
|
@ -1,225 +0,0 @@
|
||||||
/*
|
|
||||||
* Authors (alphabetical order)
|
|
||||||
* - Bertrand Songis <bsongis@gmail.com>
|
|
||||||
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
|
|
||||||
* - Cameron Weeks <th9xer@gmail.com>
|
|
||||||
* - Erez Raviv
|
|
||||||
* - Jean-Pierre Parisy
|
|
||||||
* - Karl Szmutny <shadow@privy.de>
|
|
||||||
* - Michael Blandford
|
|
||||||
* - Michal Hlavinka
|
|
||||||
* - Pat Mackenzie
|
|
||||||
* - Philip Moss
|
|
||||||
* - Rob Thomson
|
|
||||||
* - Romolo Manfredini <romolo.manfredini@gmail.com>
|
|
||||||
* - Thomas Husterer
|
|
||||||
*
|
|
||||||
* open9x is based on code named
|
|
||||||
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
|
|
||||||
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
|
|
||||||
* and the original (and ongoing) project by
|
|
||||||
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License version 2 as
|
|
||||||
* published by the Free Software Foundation.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "open9x.h"
|
|
||||||
#include "templates.h"
|
|
||||||
|
|
||||||
RlcFile theFile; //used for any file operation
|
|
||||||
|
|
||||||
void generalDefault()
|
|
||||||
{
|
|
||||||
memset(&g_eeGeneral,0,sizeof(g_eeGeneral));
|
|
||||||
g_eeGeneral.myVers = EEPROM_VER;
|
|
||||||
g_eeGeneral.contrast = 25;
|
|
||||||
g_eeGeneral.vBatWarn = 90;
|
|
||||||
for (int i = 0; i < 7; ++i) {
|
|
||||||
g_eeGeneral.calibMid[i] = 0x200;
|
|
||||||
g_eeGeneral.calibSpanNeg[i] = 0x180;
|
|
||||||
g_eeGeneral.calibSpanPos[i] = 0x180;
|
|
||||||
}
|
|
||||||
g_eeGeneral.chkSum = (0x200 * 7) + (0x180 * 5);
|
|
||||||
}
|
|
||||||
|
|
||||||
uint16_t evalChkSum()
|
|
||||||
{
|
|
||||||
uint16_t sum=0;
|
|
||||||
for (int i=0; i<12;i++)
|
|
||||||
sum += g_eeGeneral.calibMid[i];
|
|
||||||
return sum;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool eeLoadGeneral()
|
|
||||||
{
|
|
||||||
theFile.openRlc(FILE_GENERAL);
|
|
||||||
if (theFile.readRlc((uint8_t*)&g_eeGeneral, 1) == 1 && g_eeGeneral.myVers == EEPROM_VER) {
|
|
||||||
theFile.openRlc(FILE_GENERAL); // TODO include this openRlc inside readRlc
|
|
||||||
if (theFile.readRlc((uint8_t*)&g_eeGeneral, sizeof(g_eeGeneral)) <= sizeof(EEGeneral)) {
|
|
||||||
uint16_t sum = evalChkSum();
|
|
||||||
if (g_eeGeneral.chkSum == sum) {
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifndef TEMPLATES
|
|
||||||
inline void applyDefaultTemplate()
|
|
||||||
{
|
|
||||||
for (int i=0; i<NUM_STICKS; i++) {
|
|
||||||
MixData *md = mixaddress(i);
|
|
||||||
md->destCh = i;
|
|
||||||
md->weight = 100;
|
|
||||||
md->srcRaw = channel_order(i+1);
|
|
||||||
}
|
|
||||||
|
|
||||||
STORE_MODELVARS;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void modelDefault(uint8_t id)
|
|
||||||
{
|
|
||||||
memset(&g_model, 0, sizeof(g_model));
|
|
||||||
applyDefaultTemplate();
|
|
||||||
}
|
|
||||||
|
|
||||||
uint16_t eeLoadModelName(uint8_t id, char *name)
|
|
||||||
{
|
|
||||||
memset(name, 0, sizeof(g_model.name));
|
|
||||||
if (id<MAX_MODELS) {
|
|
||||||
theFile.openRlc(FILE_MODEL(id));
|
|
||||||
if (theFile.readRlc((uint8_t*)name, sizeof(g_model.name)) == sizeof(g_model.name)) {
|
|
||||||
return theFile.size();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool eeModelExists(uint8_t id)
|
|
||||||
{
|
|
||||||
return EFile::exists(FILE_MODEL(id));
|
|
||||||
}
|
|
||||||
|
|
||||||
void resetProto()
|
|
||||||
{
|
|
||||||
#if defined(DSM2_SERIAL)
|
|
||||||
if (g_model.protocol == PROTO_DSM2) {
|
|
||||||
cli();
|
|
||||||
#if defined(FRSKY)
|
|
||||||
DSM2_Init();
|
|
||||||
#endif
|
|
||||||
sei();
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
cli();
|
|
||||||
#if defined(FRSKY)
|
|
||||||
FRSKY_Init();
|
|
||||||
#else
|
|
||||||
DSM2_Done();
|
|
||||||
#endif
|
|
||||||
sei();
|
|
||||||
#if defined(FRSKY)
|
|
||||||
FRSKY_setModelAlarms();
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
#elif defined(FRSKY)
|
|
||||||
FRSKY_setModelAlarms();
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void eeLoadModel(uint8_t id)
|
|
||||||
{
|
|
||||||
if(id<MAX_MODELS)
|
|
||||||
{
|
|
||||||
theFile.openRlc(FILE_MODEL(id));
|
|
||||||
uint16_t sz = theFile.readRlc((uint8_t*)&g_model, sizeof(g_model));
|
|
||||||
|
|
||||||
#ifdef SIMU
|
|
||||||
if (sz > 0 && sz != sizeof(g_model)) {
|
|
||||||
printf("Model data read=%d bytes vs %d bytes\n", sz, (int)sizeof(ModelData));
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (sz == 0) {
|
|
||||||
// alert("Error Loading Model");
|
|
||||||
modelDefault(id);
|
|
||||||
eeCheck(true);
|
|
||||||
}
|
|
||||||
|
|
||||||
resetProto();
|
|
||||||
resetAll();
|
|
||||||
|
|
||||||
#ifdef LOGS
|
|
||||||
initLogs();
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int8_t eeFindEmptyModel(uint8_t id, bool down)
|
|
||||||
{
|
|
||||||
int8_t i = id;
|
|
||||||
for (;;) {
|
|
||||||
i = (MAX_MODELS + (down ? i+1 : i-1)) % MAX_MODELS;
|
|
||||||
if (!EFile::exists(FILE_MODEL(i))) break;
|
|
||||||
if (i == id) return -1; // no free space in directory left
|
|
||||||
}
|
|
||||||
return i;
|
|
||||||
}
|
|
||||||
|
|
||||||
void eeReadAll()
|
|
||||||
{
|
|
||||||
if(!EeFsOpen() ||
|
|
||||||
EeFsck() < 0 ||
|
|
||||||
!eeLoadGeneral())
|
|
||||||
{
|
|
||||||
alert(STR_BADEEPROMDATA, true);
|
|
||||||
message(STR_EEPROMFORMATTING);
|
|
||||||
EeFsFormat();
|
|
||||||
//alert(PSTR("format ok"));
|
|
||||||
generalDefault();
|
|
||||||
//alert(PSTR("default ok"));
|
|
||||||
|
|
||||||
theFile.writeRlc(FILE_GENERAL, FILE_TYP_GENERAL,(uint8_t*)&g_eeGeneral,sizeof(EEGeneral), true);
|
|
||||||
|
|
||||||
modelDefault(0);
|
|
||||||
//alert(PSTR("modef ok"));
|
|
||||||
theFile.writeRlc(FILE_MODEL(0), FILE_TYP_MODEL, (uint8_t*)&g_model, sizeof(g_model), true);
|
|
||||||
//alert(PSTR("modwrite ok"));
|
|
||||||
}
|
|
||||||
|
|
||||||
stickMode = g_eeGeneral.stickMode;
|
|
||||||
eeLoadModel(g_eeGeneral.currModel);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t s_eeDirtyMsk;
|
|
||||||
void eeDirty(uint8_t msk)
|
|
||||||
{
|
|
||||||
s_eeDirtyMsk |= msk;
|
|
||||||
}
|
|
||||||
|
|
||||||
void eeCheck(bool immediately)
|
|
||||||
{
|
|
||||||
if (immediately) {
|
|
||||||
eeFlush();
|
|
||||||
}
|
|
||||||
if (s_eeDirtyMsk & EE_GENERAL) {
|
|
||||||
s_eeDirtyMsk -= EE_GENERAL;
|
|
||||||
theFile.writeRlc(FILE_GENERAL, FILE_TYP_GENERAL, (uint8_t*)&g_eeGeneral, sizeof(EEGeneral), immediately);
|
|
||||||
if (!immediately) return;
|
|
||||||
}
|
|
||||||
if (s_eeDirtyMsk & EE_MODEL) {
|
|
||||||
s_eeDirtyMsk = 0;
|
|
||||||
theFile.writeRlc(FILE_MODEL(g_eeGeneral.currModel), FILE_TYP_MODEL, (uint8_t*)&g_model, sizeof(g_model), immediately);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
@ -31,7 +31,7 @@
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "menus.h"
|
#include "open9x.h"
|
||||||
|
|
||||||
void menuProcStatistic(uint8_t event)
|
void menuProcStatistic(uint8_t event)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -52,7 +52,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "open9x.h"
|
#include "open9x.h"
|
||||||
#include "templates.h"
|
|
||||||
|
|
||||||
MixData* setDest(uint8_t dch, bool clear=false)
|
MixData* setDest(uint8_t dch, bool clear=false)
|
||||||
{
|
{
|
||||||
|
|
|
||||||
|
|
@ -63,7 +63,7 @@
|
||||||
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""|v|>ofs""|v|<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""|v|>ofs""|v|<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
||||||
|
|
||||||
#define LEN_VFSWFUNC "\015"
|
#define LEN_VFSWFUNC "\015"
|
||||||
#if defined(FRSKY_HUB) or defined(WS_HOW_HIGH)
|
#if defined(FRSKY_HUB) || defined(WS_HOW_HIGH)
|
||||||
#define TR_VARIO "Vario "
|
#define TR_VARIO "Vario "
|
||||||
#else
|
#else
|
||||||
#define TR_VARIO
|
#define TR_VARIO
|
||||||
|
|
|
||||||
|
|
@ -63,7 +63,7 @@
|
||||||
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""|v|>ofs""|v|<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""|v|>ofs""|v|<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
||||||
|
|
||||||
#define LEN_VFSWFUNC "\015"
|
#define LEN_VFSWFUNC "\015"
|
||||||
#if defined(FRSKY_HUB) or defined(WS_HOW_HIGH)
|
#if defined(FRSKY_HUB) || defined(WS_HOW_HIGH)
|
||||||
#define TR_VARIO "Vario "
|
#define TR_VARIO "Vario "
|
||||||
#else
|
#else
|
||||||
#define TR_VARIO
|
#define TR_VARIO
|
||||||
|
|
|
||||||
|
|
@ -63,7 +63,7 @@
|
||||||
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""(v)>ofs""(v)<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
#define TR_VCSWFUNC "----\0 ""v>ofs ""v<ofs ""(v)>ofs""(v)<ofs""AND ""OR ""XOR ""v1==v2 ""v1!=v2 ""v1>v2 ""v1<v2 ""v1>=v2 ""v1<=v2 "
|
||||||
|
|
||||||
#define LEN_VFSWFUNC "\015"
|
#define LEN_VFSWFUNC "\015"
|
||||||
#if defined(FRSKY_HUB) or defined(WS_HOW_HIGH)
|
#if defined(FRSKY_HUB) || defined(WS_HOW_HIGH)
|
||||||
#define TR_VARIO "Vario "
|
#define TR_VARIO "Vario "
|
||||||
#else
|
#else
|
||||||
#define TR_VARIO
|
#define TR_VARIO
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue