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[Sky9x] Fixes in Sky9x pulses driver. Would if fix #3203 ?

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This commit is contained in:
Bertrand Songis 2016-04-28 18:58:45 +02:00
parent c147b2edbc
commit 9106ee581d
1 changed files with 69 additions and 54 deletions
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123
radio/src/targets/sky9x/pulses_driver.cpp
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@ -1,24 +1,24 @@
/* /*
* Copyright (C) OpenTX * Copyright (C) OpenTX
* *
* Based on code named * Based on code named
* th9x - http://code.google.com/p/th9x * th9x - http://code.google.com/p/th9x
* er9x - http://code.google.com/p/er9x * er9x - http://code.google.com/p/er9x
* gruvin9x - http://code.google.com/p/gruvin9x * gruvin9x - http://code.google.com/p/gruvin9x
* *
* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html * License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
* *
* This program is distributed in the hope that it will be useful, * This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of * but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include "../../opentx.h" #include "opentx.h"
void module_output_active() void module_output_active()
{ {
@ -27,7 +27,7 @@ void module_output_active()
pioptr->PIO_ABCDSR[1] |= PIO_PA17 ; // Peripheral C pioptr->PIO_ABCDSR[1] |= PIO_PA17 ; // Peripheral C
pioptr->PIO_PDR = PIO_PA17 ; // Disable bit A17 Assign to peripheral pioptr->PIO_PDR = PIO_PA17 ; // Disable bit A17 Assign to peripheral
#if defined(REVX) #if defined(REVX)
if (g_model.moduleData[EXTERNAL_MODULE].ppm.OutputType) { if (g_model.moduleData[EXTERNAL_MODULE].ppm.OutputType) {
pioptr->PIO_MDDR = PIO_PA17 ; // Push Pull O/p in A17 pioptr->PIO_MDDR = PIO_PA17 ; // Push Pull O/p in A17
} }
else { else {
@ -52,33 +52,53 @@ void init_main_ppm(uint32_t period, uint32_t out_enable)
pwmptr = PWM ; pwmptr = PWM ;
// PWM3 for PPM output // PWM3 for PPM output
pwmptr->PWM_CH_NUM[3].PWM_CMR = 0x0004000B ; // CLKA pwmptr->PWM_CH_NUM[3].PWM_CMR = 0x0004000B ; // CLKA
if (!g_model.moduleData[EXTERNAL_MODULE].ppm.pulsePol) { if (!g_model.moduleData[EXTERNAL_MODULE].ppm.pulsePol) {
pwmptr->PWM_CH_NUM[3].PWM_CMR |= 0x00000200 ; // CPOL pwmptr->PWM_CH_NUM[3].PWM_CMR |= 0x00000200 ; // CPOL
} }
pwmptr->PWM_CH_NUM[3].PWM_CPDR = period ; // Period in half uS pwmptr->PWM_CH_NUM[3].PWM_CPDR = period ; // Period in half uS
pwmptr->PWM_CH_NUM[3].PWM_CPDRUPD = period ; // Period in half uS pwmptr->PWM_CH_NUM[3].PWM_CPDRUPD = period ; // Period in half uS
pwmptr->PWM_CH_NUM[3].PWM_CDTY = g_model.moduleData[EXTERNAL_MODULE].ppm.delay*100+600; // Duty in half uS pwmptr->PWM_CH_NUM[3].PWM_CDTY = g_model.moduleData[EXTERNAL_MODULE].ppm.delay*100+600; // Duty in half uS
pwmptr->PWM_CH_NUM[3].PWM_CDTYUPD = g_model.moduleData[EXTERNAL_MODULE].ppm.delay*100+600; // Duty in half uS pwmptr->PWM_CH_NUM[3].PWM_CDTYUPD = g_model.moduleData[EXTERNAL_MODULE].ppm.delay*100+600; // Duty in half uS
pwmptr->PWM_ENA = PWM_ENA_CHID3 ; // Enable channel 3 pwmptr->PWM_ENA = PWM_ENA_CHID3 ; // Enable channel 3
pwmptr->PWM_IER1 = PWM_IER1_CHID3 ; pwmptr->PWM_IER1 = PWM_IER1_CHID3 ;
NVIC_SetPriority(PWM_IRQn, 3 ) ;
NVIC_EnableIRQ(PWM_IRQn) ;
}
void disable_main_ppm()
{
register Pio * pioptr = PIOA;
pioptr->PIO_PER = PIO_PA17; // Assign A17 to PIO
PWM->PWM_IDR1 = PWM_IDR1_CHID3;
}
void init_second_ppm(uint32_t period)
{
#if !defined(REVA) #if !defined(REVA)
// PWM1 for PPM2 // PWM1 for PPM2
register Pwm * pwmptr = PWM;
configure_pins(PIO_PC15, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ; configure_pins(PIO_PC15, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_B | PIN_PORTC | PIN_NO_PULLUP ) ;
pwmptr->PWM_CH_NUM[1].PWM_CMR = 0x0000000B ; // CLKB pwmptr->PWM_CH_NUM[1].PWM_CMR = 0x0000000B ; // CLKB
if (!g_model.moduleData[EXTRA_MODULE].ppm.pulsePol) { if (!g_model.moduleData[EXTRA_MODULE].ppm.pulsePol) {
pwmptr->PWM_CH_NUM[1].PWM_CMR |= 0x00000200 ; // CPOL pwmptr->PWM_CH_NUM[1].PWM_CMR |= 0x00000200 ; // CPOL
} }
pwmptr->PWM_CH_NUM[1].PWM_CPDR = period ; // Period pwmptr->PWM_CH_NUM[1].PWM_CPDR = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = period ; // Period pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = period ; // Period
pwmptr->PWM_CH_NUM[1].PWM_CDTY = g_model.moduleData[EXTRA_MODULE].ppm.delay*100+600 ; // Duty pwmptr->PWM_CH_NUM[1].PWM_CDTY = g_model.moduleData[EXTRA_MODULE].ppm.delay*100+600 ; // Duty
pwmptr->PWM_CH_NUM[1].PWM_CDTYUPD = g_model.moduleData[EXTRA_MODULE].ppm.delay*100+600 ; // Duty pwmptr->PWM_CH_NUM[1].PWM_CDTYUPD = g_model.moduleData[EXTRA_MODULE].ppm.delay*100+600 ; // Duty
pwmptr->PWM_ENA = PWM_ENA_CHID1 ; // Enable channel 1 pwmptr->PWM_ENA = PWM_ENA_CHID1 ; // Enable channel 1
pwmptr->PWM_IER1 = PWM_IER1_CHID1 ; pwmptr->PWM_IER1 = PWM_IER1_CHID1 ;
#endif #endif
}
NVIC_SetPriority(PWM_IRQn, 3 ) ; void disable_second_ppm()
NVIC_EnableIRQ(PWM_IRQn) ; {
#if !defined(REVA)
register Pio * pioptr = PIOC;
pioptr->PIO_PER = PIO_PC15 ; // Assign C17 to PIO
PWM->PWM_IDR1 = PWM_IDR1_CHID1 ;
#endif
} }
void init_no_pulses(uint32_t port) void init_no_pulses(uint32_t port)
@ -107,26 +127,17 @@ void init_ppm(uint32_t port)
init_main_ppm(3000, 1); init_main_ppm(3000, 1);
} }
else { else {
// TODO init_second_ppm(3000);
} }
} }
void disable_ppm(uint32_t port) void disable_ppm(uint32_t port)
{ {
register Pio *pioptr ;
if (port == EXTERNAL_MODULE) { if (port == EXTERNAL_MODULE) {
pioptr = PIOA ; disable_main_ppm();
pioptr->PIO_PER = PIO_PA17 ; // Assign A17 to PIO
PWM->PWM_IDR1 = PWM_IDR1_CHID3 ;
} }
else { else {
#if !defined(REVA) disable_second_ppm();
pioptr = PIOC ;
pioptr->PIO_PER = PIO_PC17 ; // Assign C17 to PIO
PWM->PWM_IDR1 = PWM_IDR1_CHID1 ;
NVIC_DisableIRQ(PWM_IRQn) ;
#endif
} }
} }
@ -134,17 +145,24 @@ void disable_ppm(uint32_t port)
// TD is on PA17, peripheral A // TD is on PA17, peripheral A
void init_ssc() void init_ssc()
{ {
register Ssc *sscptr ; register Ssc * sscptr ;
PMC->PMC_PCER0 |= 0x00400000L ; // Enable peripheral clock to SSC PMC->PMC_PCER0 |= 0x00400000L ; // Enable peripheral clock to SSC
configure_pins( PIO_PA17, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ; configure_pins(PIO_PA17, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA) ;
sscptr = SSC ; sscptr = SSC ;
sscptr->SSC_THR = 0xFF ; // Make the output high.
sscptr->SSC_TFMR = 0x00000027 ; // 0000 0000 0000 0000 0000 0000 1010 0111 (8 bit data, lsb)
sscptr->SSC_CMR = Master_frequency / (125000*2) ; // 8uS per bit sscptr->SSC_CMR = Master_frequency / (125000*2) ; // 8uS per bit
sscptr->SSC_TCMR = 0 ; // 0000 0000 0000 0000 0000 0000 0000 0000 sscptr->SSC_TCMR = 0 ; // 0000 0000 0000 0000 0000 0000 0000 0000
sscptr->SSC_TFMR = 0x00000027 ; // 0000 0000 0000 0000 0000 0000 1010 0111 (8 bit data, lsb)
sscptr->SSC_CR = SSC_CR_TXEN ; sscptr->SSC_CR = SSC_CR_TXEN ;
#if defined(REVX)
PIOA->PIO_MDER = PIO_PA17; // Open Drain O/p in A17
#else
PIOA->PIO_MDDR = PIO_PA17; // Push Pull O/p in A17
#endif
} }
void disable_ssc() void disable_ssc()
@ -207,13 +225,10 @@ void disable_dsm2(uint32_t port)
#if !defined(SIMU) #if !defined(SIMU)
extern "C" void PWM_IRQHandler(void) extern "C" void PWM_IRQHandler(void)
{ {
register Pwm *pwmptr; register Pwm * pwmptr = PWM;
register Ssc *sscptr; uint32_t reason = pwmptr->PWM_ISR1;
uint32_t period; uint32_t period;
uint32_t reason;
pwmptr = PWM;
reason = pwmptr->PWM_ISR1 ;
if (reason & PWM_ISR1_CHID3) { if (reason & PWM_ISR1_CHID3) {
// Use the current protocol, don't switch until set_up_pulses // Use the current protocol, don't switch until set_up_pulses
switch (s_current_protocol[EXTERNAL_MODULE]) { switch (s_current_protocol[EXTERNAL_MODULE]) {
@ -232,7 +247,7 @@ extern "C" void PWM_IRQHandler(void)
} }
else { else {
// Kick off serial output here // Kick off serial output here
sscptr = SSC; register Ssc * sscptr = SSC;
sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].pxx.pulses); sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].pxx.pulses);
sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.pulses; sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.pulses;
sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
@ -256,7 +271,7 @@ extern "C" void PWM_IRQHandler(void)
} }
else { else {
// Kick off serial output here // Kick off serial output here
sscptr = SSC; register Ssc * sscptr = SSC;
sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].dsm2.pulses); sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].dsm2.pulses);
sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.pulses; sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.pulses;
sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
@ -275,8 +290,8 @@ extern "C" void PWM_IRQHandler(void)
#if !defined(REVA) #if !defined(REVA)
if (reason & PWM_ISR1_CHID1) { if (reason & PWM_ISR1_CHID1) {
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++; pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = *modulePulsesData[EXTRA_MODULE].ppm.ptr++;
if (*modulePulsesData[EXTERNAL_MODULE].ppm.ptr == 0) { if (*modulePulsesData[EXTRA_MODULE].ppm.ptr == 0) {
setupPulsesPPM(EXTRA_MODULE); setupPulsesPPM(EXTRA_MODULE);
} }
} }