mirror of
https://github.com/opentx/opentx.git
synced 2025-07-24 16:55:20 +03:00
[Taranis] Saves around 800bytes RAM (the same space is used for
DSM2/PPM/PXX pulses on external module)
This commit is contained in:
parent
4d2b387098
commit
9886dede73
10 changed files with 141 additions and 126 deletions
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@ -39,15 +39,7 @@
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#define DSM2_SEND_BIND (1 << 7)
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#define DSM2_SEND_RANGECHECK (1 << 5)
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#if defined(PCBTARANIS)
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uint16_t dsm2Stream[400]; // Likely more than we need
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uint16_t *dsm2StreamPtr;
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uint16_t dsm2Value;
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#else
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uint8_t dsm2Stream[64]; // Likely more than we need
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uint8_t *dsm2StreamPtr;
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uint8_t dsm2SerialByte ;
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uint8_t dsm2SerialBitCount;
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#if defined(PCBSKY9X)
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uint8_t dsm2BindTimer = DSM2_BIND_TIMEOUT;
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#endif
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@ -60,18 +52,17 @@ uint8_t dsm2BindTimer = DSM2_BIND_TIMEOUT;
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#define BITLEN_DSM2 (8*2) //125000 Baud => 8uS per bit
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#if defined(PCBTARANIS)
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uint8_t dsm2Index = 0;
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void _send_1(uint8_t v)
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{
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if (dsm2Index == 0)
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if (modulePulsesData[EXTERNAL_MODULE].dsm2.index == 0)
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v -= 2;
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else
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v += 2;
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dsm2Value += v;
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*dsm2StreamPtr++ = dsm2Value;
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modulePulsesData[EXTERNAL_MODULE].dsm2.value += v;
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*modulePulsesData[EXTERNAL_MODULE].dsm2.ptr++ = modulePulsesData[EXTERNAL_MODULE].dsm2.value;
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dsm2Index = (dsm2Index+1) % 2;
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modulePulsesData[EXTERNAL_MODULE].dsm2.index = (modulePulsesData[EXTERNAL_MODULE].dsm2.index+1) % 2;
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}
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void sendByteDsm2(uint8_t b) //max 10 changes 0 10 10 10 10 1
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@ -94,19 +85,19 @@ void sendByteDsm2(uint8_t b) //max 10 changes 0 10 10 10 10 1
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}
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void putDsm2Flush()
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{
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dsm2StreamPtr--; //remove last stopbits and
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*dsm2StreamPtr++ = 44010; // Past the 44000 of the ARR
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modulePulsesData[EXTERNAL_MODULE].dsm2.ptr--; //remove last stopbits and
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*modulePulsesData[EXTERNAL_MODULE].dsm2.ptr++ = 44010; // Past the 44000 of the ARR
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}
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#else
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void putDsm2SerialBit(uint8_t bit)
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{
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dsm2SerialByte >>= 1;
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modulePulsesData[EXTERNAL_MODULE].dsm2.serialByte >>= 1;
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if (bit & 1) {
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dsm2SerialByte |= 0x80;
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modulePulsesData[EXTERNAL_MODULE].dsm2.serialByte |= 0x80;
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}
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if (++dsm2SerialBitCount >= 8) {
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*dsm2StreamPtr++ = dsm2SerialByte;
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dsm2SerialBitCount = 0;
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if (++modulePulsesData[EXTERNAL_MODULE].dsm2.serialBitCount >= 8) {
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*modulePulsesData[EXTERNAL_MODULE].dsm2.ptr++ = modulePulsesData[EXTERNAL_MODULE].dsm2.serialByte;
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modulePulsesData[EXTERNAL_MODULE].dsm2.serialBitCount = 0;
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}
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}
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void sendByteDsm2(uint8_t b) // max 10changes 0 10 10 10 10 1
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@ -137,18 +128,18 @@ void setupPulsesDSM2(unsigned int port)
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static uint8_t dsmDat[2+6*2]={0xFF,0x00, 0x00,0xAA, 0x05,0xFF, 0x09,0xFF, 0x0D,0xFF, 0x13,0x54, 0x14,0xAA};
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#if defined(PCBSKY9X)
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dsm2SerialByte = 0 ;
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dsm2SerialBitCount = 0 ;
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modulePulsesData[EXTERNAL_MODULE].dsm2.serialByte = 0 ;
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modulePulsesData[EXTERNAL_MODULE].dsm2.serialBitCount = 0 ;
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#else
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dsm2Value = 0;
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dsm2Index = 1;
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modulePulsesData[EXTERNAL_MODULE].dsm2.value = 0;
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modulePulsesData[EXTERNAL_MODULE].dsm2.index = 1;
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#endif
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dsm2StreamPtr = dsm2Stream;
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modulePulsesData[EXTERNAL_MODULE].dsm2.ptr = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses;
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#if defined(PCBTARANIS)
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dsm2Value = 100;
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*dsm2StreamPtr++ = dsm2Value;
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modulePulsesData[EXTERNAL_MODULE].dsm2.value = 100;
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*modulePulsesData[EXTERNAL_MODULE].dsm2.ptr++ = modulePulsesData[EXTERNAL_MODULE].dsm2.value;
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#endif
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switch (s_current_protocol[port]) {
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@ -36,13 +36,6 @@
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#include "../opentx.h"
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#define PPM_STREAM_INIT { 2000, 2200, 2400, 2600, 2800, 3000, 3200, 3400, 9000, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
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#if defined(PCBTARANIS)
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uint16_t ppmStream[NUM_MODULES+1][20] = { PPM_STREAM_INIT, PPM_STREAM_INIT, PPM_STREAM_INIT };
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#else
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uint16_t ppmStream[NUM_MODULES][20] = { MODULES_INIT(PPM_STREAM_INIT) };
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#endif
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void setupPulsesPPM(unsigned int port) // Don't enable interrupts through here
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{
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int16_t PPM_range = g_model.extendedLimits ? (512*LIMIT_EXT_PERCENT/100) * 2 : 512 * 2; //range of 0.7..1.7msec
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@ -65,7 +58,7 @@ void setupPulsesPPM(unsigned int port) // Don't enable interru
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pwmptr->PWM_CH_NUM[pwmCh].PWM_CMR |= 0x00000200 ; // CPOL
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#endif
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uint16_t * ptr = ppmStream[port];
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uint16_t * ptr = (port == TRAINER_MODULE ? trainerPulsesData.ppm.pulses : modulePulsesData[port].ppm.pulses);
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int32_t rest = 22500u * 2;
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rest += (int32_t(g_model.moduleData[port].ppmFrameLength)) * 1000;
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for (uint32_t i=firstCh; i<lastCh; i++) {
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@ -41,6 +41,9 @@ uint8_t s_current_protocol[NUM_MODULES] = { MODULES_INIT(255) };
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uint16_t failsafeCounter[NUM_MODULES] = { MODULES_INIT(100) };
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uint8_t moduleFlag[NUM_MODULES] = { 0 };
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ModulePulsesData modulePulsesData[NUM_MODULES];
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TrainerPulsesData trainerPulsesData;
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void setupPulses(unsigned int port)
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{
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uint8_t required_protocol;
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@ -47,6 +47,59 @@ extern uint8_t s_current_protocol[NUM_MODULES];
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extern uint8_t s_pulses_paused;
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extern uint16_t failsafeCounter[NUM_MODULES];
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#if defined(PCBSKY9X)
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PACK(struct PpmPulsesData {
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uint16_t pulses[20];
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uint32_t index;
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});
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PACK(struct PxxPulsesData {
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uint8_t pulses[64];
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uint8_t *ptr;
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uint16_t pcmValue;
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uint16_t pcmCrc;
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uint32_t pcmOnesCount;
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uint16_t serialByte;
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uint16_t serialBitCount;
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});
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PACK(struct Dsm2PulsesData {
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uint8_t pulses[64];
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uint8_t *ptr;
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uint8_t serialByte ;
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uint8_t serialBitCount;
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});
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#else
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PACK(struct PpmPulsesData {
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uint16_t pulses[20];
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uint16_t *ptr;
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});
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PACK(struct PxxPulsesData {
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uint16_t pulses[400];
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uint16_t *ptr;
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uint16_t pcmValue;
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uint16_t pcmCrc;
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uint32_t pcmOnesCount;
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});
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PACK(struct Dsm2PulsesData {
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uint16_t pulses[400];
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uint16_t *ptr;
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uint16_t value;
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uint16_t index;
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});
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#endif
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union ModulePulsesData {
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PxxPulsesData pxx;
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Dsm2PulsesData dsm2;
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PpmPulsesData ppm;
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};
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union TrainerPulsesData {
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PpmPulsesData ppm;
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};
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extern ModulePulsesData modulePulsesData[NUM_MODULES];
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extern TrainerPulsesData trainerPulsesData;
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void setupPulses(unsigned int port);
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void setupPulsesDSM2(unsigned int port);
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void setupPulsesPXX(unsigned int port);
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@ -64,7 +117,7 @@ inline void startPulses()
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setupPulses(INTERNAL_MODULE);
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setupPulses(EXTERNAL_MODULE);
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#else
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setupPulses(0);
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setupPulses(EXTERNAL_MODULE);
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#endif
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#if defined(HUBSAN)
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@ -40,18 +40,6 @@
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#define PXX_SEND_FAILSAFE (1 << 4)
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#define PXX_SEND_RANGECHECK (1 << 5)
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#if defined(PCBTARANIS)
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uint16_t pxxStream[NUM_MODULES][400];
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uint16_t *pxxStreamPtr[NUM_MODULES];
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#else
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uint8_t pxxStream[NUM_MODULES][64];
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uint8_t *pxxStreamPtr[NUM_MODULES];
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#endif
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uint16_t PxxValue[NUM_MODULES];
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uint16_t PcmCrc[NUM_MODULES];
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uint8_t PcmOnesCount[NUM_MODULES];
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const uint16_t CRCTable[]=
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{
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0x0000,0x1189,0x2312,0x329b,0x4624,0x57ad,0x6536,0x74bf,
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void crc(uint8_t data, unsigned int port)
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{
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PcmCrc[port]=(PcmCrc[port]<<8)^(CRCTable[((PcmCrc[port]>>8)^data) & 0xFF]);
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modulePulsesData[port].pxx.pcmCrc = (modulePulsesData[port].pxx.pcmCrc<<8) ^ (CRCTable[((modulePulsesData[port].pxx.pcmCrc>>8)^data) & 0xFF]);
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}
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#if defined(PCBTARANIS)
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void putPcmPart(uint8_t value, unsigned int port)
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{
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PxxValue[port] += 18 ; // Output 1 for this time
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*pxxStreamPtr[port]++ = PxxValue[port] ;
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PxxValue[port] += 14 ;
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modulePulsesData[port].pxx.pcmValue += 18 ; // Output 1 for this time
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*modulePulsesData[port].pxx.ptr++ = modulePulsesData[port].pxx.pcmValue ;
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modulePulsesData[port].pxx.pcmValue += 14 ;
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if (value) {
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PxxValue[port] += 16 ;
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modulePulsesData[port].pxx.pcmValue += 16 ;
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}
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*pxxStreamPtr[port]++ = PxxValue[port] ; // Output 0 for this time
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*modulePulsesData[port].pxx.ptr++ = modulePulsesData[port].pxx.pcmValue ; // Output 0 for this time
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}
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void putPcmFlush(unsigned int port)
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{
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*pxxStreamPtr[port]++ = 18010 ; // Past the 18000 of the ARR
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*modulePulsesData[port].pxx.ptr++ = 18010 ; // Past the 18000 of the ARR
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}
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#else
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uint8_t pcmSerialByte[NUM_MODULES];
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uint8_t pcmSerialBitCount[NUM_MODULES];
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void putPcmSerialBit(uint8_t bit, unsigned int port)
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{
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pcmSerialByte[port] >>= 1;
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modulePulsesData[port].pxx.serialByte >>= 1;
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if (bit & 1) {
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pcmSerialByte[port] |= 0x80;
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modulePulsesData[port].pxx.serialByte |= 0x80;
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}
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if (++pcmSerialBitCount[port] >= 8) {
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*pxxStreamPtr[port]++ = pcmSerialByte[port];
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pcmSerialBitCount[port] = 0;
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if (++modulePulsesData[port].pxx.serialBitCount >= 8) {
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*modulePulsesData[port].pxx.ptr++ = modulePulsesData[port].pxx.serialByte;
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modulePulsesData[port].pxx.serialBitCount = 0;
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}
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}
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@ -139,7 +125,7 @@ void putPcmPart(uint8_t value, unsigned int port)
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void putPcmFlush(unsigned int port)
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{
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while (pcmSerialBitCount[port] != 0) {
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while (modulePulsesData[port].pxx.serialBitCount != 0) {
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putPcmSerialBit(1, port);
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}
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}
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@ -149,14 +135,14 @@ void putPcmFlush(unsigned int port)
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void putPcmBit(uint8_t bit, unsigned int port)
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{
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if (bit) {
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PcmOnesCount[port] += 1;
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modulePulsesData[port].pxx.pcmOnesCount += 1;
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putPcmPart(1, port);
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}
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else {
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PcmOnesCount[port] = 0;
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modulePulsesData[port].pxx.pcmOnesCount = 0;
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putPcmPart(0, port);
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}
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if (PcmOnesCount[port] >= 5) {
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if (modulePulsesData[port].pxx.pcmOnesCount >= 5) {
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putPcmBit(0, port); // Stuff a 0 bit in
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}
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}
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@ -189,10 +175,10 @@ void setupPulsesPXX(unsigned int port)
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{
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uint16_t chan=0, chan_low=0;
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pxxStreamPtr[port] = pxxStream[port];
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PxxValue[port] = 0 ;
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PcmCrc[port] = 0;
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PcmOnesCount[port] = 0;
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modulePulsesData[port].pxx.ptr = modulePulsesData[port].pxx.pulses;
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modulePulsesData[port].pxx.pcmValue = 0 ;
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modulePulsesData[port].pxx.pcmCrc = 0;
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modulePulsesData[port].pxx.pcmOnesCount = 0;
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/* Preamble */
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putPcmPart(0, port);
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/* CRC16 */
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putPcmByte(0, port);
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chan = PcmCrc[port];
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chan = modulePulsesData[port].pxx.pcmCrc;
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putPcmByte(chan>>8, port);
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putPcmByte(chan, port);
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@ -420,6 +420,7 @@ extern OS_MutexID audioMutex;
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#define CoLeaveMutexSection(m) pthread_mutex_unlock(&(m))
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#define CoTickDelay(...)
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#define CoCreateFlag(...) 0
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#define CoGetOSTime(...) 0
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inline void UART3_Configure(uint32_t baudrate, uint32_t masterClock) { }
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#define UART_Stop(...)
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#define UART3_Stop(...)
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@ -36,13 +36,6 @@
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#include "../../opentx.h"
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extern uint16_t ppmStream[NUM_MODULES][20];
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volatile uint32_t ppmStreamIndex[NUM_MODULES] = { MODULES_INIT(0) }; // Modified in interrupt routine
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extern uint8_t pxxStream[NUM_MODULES][64]; // TODO not here, duplicated
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extern uint8_t *pxxStreamPtr[NUM_MODULES]; // TODO not here, duplicated
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extern uint8_t dsm2Stream[64]; // Likely more than we need
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extern uint8_t *dsm2StreamPtr;
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void module_output_active()
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{
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register Pio *pioptr = PIOA ;
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#endif
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}
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void init_main_ppm(uint32_t period, uint32_t out_enable)
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{
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register Pwm *pwmptr ;
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@ -245,8 +237,8 @@ extern "C" void PWM_IRQHandler(void)
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else {
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// Kick off serial output here
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sscptr = SSC;
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sscptr->SSC_TPR = CONVERT_PTR_UINT(pxxStream[EXTERNAL_MODULE]);
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sscptr->SSC_TCR = (uint8_t *)pxxStreamPtr[EXTERNAL_MODULE] - (uint8_t *)pxxStream[EXTERNAL_MODULE];
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sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].pxx.pulses);
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sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].pxx.pulses;
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sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
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}
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break;
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else {
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// Kick off serial output here
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sscptr = SSC;
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sscptr->SSC_TPR = CONVERT_PTR_UINT(dsm2Stream);
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sscptr->SSC_TCR = (uint8_t *)dsm2StreamPtr - (uint8_t *)dsm2Stream;
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sscptr->SSC_TPR = CONVERT_PTR_UINT(modulePulsesData[EXTERNAL_MODULE].dsm2.pulses);
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sscptr->SSC_TCR = (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.ptr - (uint8_t *)modulePulsesData[EXTERNAL_MODULE].dsm2.pulses;
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sscptr->SSC_PTCR = SSC_PTCR_TXTEN; // Start transfers
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}
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break;
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default:
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pwmptr->PWM_CH_NUM[3].PWM_CPDRUPD = ppmStream[EXTERNAL_MODULE][ppmStreamIndex[EXTERNAL_MODULE]++]; // Period in half uS
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if (ppmStream[EXTERNAL_MODULE][ppmStreamIndex[EXTERNAL_MODULE]] == 0) {
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ppmStreamIndex[EXTERNAL_MODULE] = 0;
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pwmptr->PWM_CH_NUM[3].PWM_CPDRUPD = modulePulsesData[EXTERNAL_MODULE].ppm.pulses[modulePulsesData[EXTERNAL_MODULE].ppm.index++]; // Period in half uS
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if (modulePulsesData[EXTERNAL_MODULE].ppm.pulses[modulePulsesData[EXTERNAL_MODULE].ppm.index] == 0) {
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modulePulsesData[EXTERNAL_MODULE].ppm.index = 0;
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setupPulses(EXTERNAL_MODULE);
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}
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break;
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@ -287,9 +279,9 @@ extern "C" void PWM_IRQHandler(void)
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}
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if (reason & PWM_ISR1_CHID1) {
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pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = ppmStream[EXTRA_MODULE][ppmStreamIndex[EXTRA_MODULE]++] ; // Period in half uS
|
||||
if (ppmStream[EXTRA_MODULE][ppmStreamIndex[EXTRA_MODULE]] == 0) {
|
||||
ppmStreamIndex[EXTRA_MODULE] = 0;
|
||||
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = modulePulsesData[EXTRA_MODULE].ppm.pulses[modulePulsesData[EXTRA_MODULE].ppm.index++] ; // Period in half uS
|
||||
if (modulePulsesData[EXTRA_MODULE].ppm.pulses[modulePulsesData[EXTRA_MODULE].ppm.index] == 0) {
|
||||
modulePulsesData[EXTRA_MODULE].ppm.index = 0;
|
||||
setupPulsesPPM(EXTRA_MODULE);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -196,8 +196,11 @@ uint32_t isBootloaderStart(const void * buffer);
|
|||
void init_no_pulses(uint32_t port);
|
||||
void disable_no_pulses(uint32_t port);
|
||||
void init_ppm( uint32_t module_index );
|
||||
void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
|
||||
void disable_ppm( uint32_t module_index );
|
||||
void set_external_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
|
||||
#if defined(TARANIS_INTERNAL_PPM)
|
||||
void set_internal_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive);
|
||||
#endif
|
||||
void init_pxx( uint32_t module_index );
|
||||
void disable_pxx( uint32_t module_index );
|
||||
void init_dsm2( uint32_t module_index );
|
||||
|
@ -261,7 +264,7 @@ void pwrOff(void);
|
|||
uint32_t pwrPressed(void);
|
||||
uint32_t pwrPressedDuration(void);
|
||||
#endif
|
||||
#define UNEXPECTED_SHUTDOWN() (g_eeGeneral.unexpectedShutdown)
|
||||
#define UNEXPECTED_SHUTDOWN() (g_eeGeneral.unexpectedShutdown)
|
||||
|
||||
// Backlight driver
|
||||
#if defined(REVPLUS)
|
||||
|
|
|
@ -40,11 +40,6 @@ void setupPulses(unsigned int port);
|
|||
void setupPulsesPPM(unsigned int port);
|
||||
void setupPulsesPXX(unsigned int port);
|
||||
|
||||
uint16_t *ppmStreamPtr[NUM_MODULES];
|
||||
extern uint16_t ppmStream[NUM_MODULES+1][20];
|
||||
extern uint16_t pxxStream[NUM_MODULES][400];
|
||||
extern uint16_t dsm2Stream[400];
|
||||
|
||||
static void init_pa10_pxx( void ) ;
|
||||
static void disable_pa10_pxx( void ) ;
|
||||
#if defined(TARANIS_INTERNAL_PPM)
|
||||
|
@ -272,7 +267,7 @@ static void init_pa10_pxx()
|
|||
|
||||
TIM1->CR2 = TIM_CR2_OIS3 ; // O/P idle high
|
||||
TIM1->BDTR = TIM_BDTR_MOE ; // Enable outputs
|
||||
TIM1->CCR3 = pxxStream[INTERNAL_MODULE][0];
|
||||
TIM1->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
|
||||
TIM1->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0 ; // Force O/P high
|
||||
TIM1->EGR = 1 ; // Restart
|
||||
|
||||
|
@ -288,7 +283,7 @@ static void init_pa10_pxx()
|
|||
DMA2_Stream6->CR = DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
|
||||
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
|
||||
DMA2_Stream6->PAR = CONVERT_PTR_UINT(&TIM1->DMAR);
|
||||
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&pxxStream[INTERNAL_MODULE][1]);
|
||||
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&modulePulsesData[INTERNAL_MODULE].pxx.pulses[1]);
|
||||
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
|
||||
// DMA2_Stream2->NDTR = 100 ;
|
||||
DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
|
@ -318,7 +313,7 @@ static void init_pa10_ppm()
|
|||
{
|
||||
INTERNAL_MODULE_ON();
|
||||
// Timer1
|
||||
ppmStreamPtr[INTERNAL_MODULE] = ppmStream[INTERNAL_MODULE];
|
||||
modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
|
||||
|
||||
//RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIO_INTPPM, ENABLE);
|
||||
|
@ -332,7 +327,7 @@ static void init_pa10_ppm()
|
|||
// so it has to be called after the peripheral is enabled
|
||||
setupPulsesPPM(INTERNAL_MODULE) ;
|
||||
|
||||
TIM1->ARR = *ppmStreamPtr[INTERNAL_MODULE]++ ;
|
||||
TIM1->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
|
||||
TIM1->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
|
||||
|
||||
TIM1->CCER = TIM_CCER_CC3E ;
|
||||
|
@ -377,13 +372,13 @@ extern "C" void TIM1_CC_IRQHandler()
|
|||
if (s_current_protocol[INTERNAL_MODULE] == PROTO_PXX) {
|
||||
DMA2_Stream6->CR &= ~DMA_SxCR_EN ; // Disable DMA
|
||||
DMA2->HIFCR = DMA_HIFCR_CTCIF6 | DMA_HIFCR_CHTIF6 | DMA_HIFCR_CTEIF6 | DMA_HIFCR_CDMEIF6 | DMA_HIFCR_CFEIF6 ; // Write ones to clear bits
|
||||
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&pxxStream[INTERNAL_MODULE][1]);
|
||||
DMA2_Stream6->M0AR = CONVERT_PTR_UINT(&modulePulsesData[INTERNAL_MODULE].pxx.pulses[1]);
|
||||
DMA2_Stream6->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
TIM1->CCR3 = pxxStream[INTERNAL_MODULE][0];
|
||||
TIM1->CCR3 = modulePulsesData[INTERNAL_MODULE].pxx.pulses[0];
|
||||
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
}
|
||||
else if (s_current_protocol[INTERNAL_MODULE] == PROTO_PPM) {
|
||||
ppmStreamPtr[INTERNAL_MODULE] = ppmStream[INTERNAL_MODULE];
|
||||
modulePulsesData[INTERNAL_MODULE].ppm.ptr = modulePulsesData[INTERNAL_MODULE].ppm.pulses;
|
||||
TIM1->DIER |= TIM_DIER_UDE ;
|
||||
TIM1->SR &= ~TIM_SR_UIF ; // Clear this flag
|
||||
TIM1->DIER |= TIM_DIER_UIE ; // Enable this interrupt
|
||||
|
@ -397,8 +392,8 @@ extern "C" void TIM1_UP_TIM10_IRQHandler()
|
|||
{
|
||||
TIM1->SR &= ~TIM_SR_UIF ; // Clear flag
|
||||
|
||||
TIM1->ARR = *ppmStreamPtr[INTERNAL_MODULE]++ ;
|
||||
if ( *ppmStreamPtr[INTERNAL_MODULE] == 0 )
|
||||
TIM1->ARR = *modulePulsesData[INTERNAL_MODULE].ppm.ptr++ ;
|
||||
if ( *modulePulsesData[INTERNAL_MODULE].ppm.ptr == 0 )
|
||||
{
|
||||
TIM1->SR &= ~TIM_SR_CC2IF ; // Clear this flag
|
||||
TIM1->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
|
@ -433,7 +428,7 @@ void init_pa7_pxx()
|
|||
TIM8->CCER = TIM_CCER_CC1NE ;
|
||||
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
|
||||
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
|
||||
TIM8->CCR1 = pxxStream[EXTERNAL_MODULE][0] ;
|
||||
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
|
||||
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
|
||||
TIM8->EGR = 1 ; // Restart
|
||||
|
||||
|
@ -449,7 +444,7 @@ void init_pa7_pxx()
|
|||
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
|
||||
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
|
||||
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&pxxStream[EXTERNAL_MODULE][1]);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]);
|
||||
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
|
||||
// DMA2_Stream2->NDTR = 100 ;
|
||||
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
|
@ -501,7 +496,7 @@ static void init_pa7_dsm2()
|
|||
TIM8->CCER = TIM_CCER_CC1NE | TIM_CCER_CC1NP ;
|
||||
TIM8->CR2 = TIM_CR2_OIS1 ; // O/P idle high
|
||||
TIM8->BDTR = TIM_BDTR_MOE ; // Enable outputs
|
||||
TIM8->CCR1 = dsm2Stream[0] ;
|
||||
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
|
||||
TIM8->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0 ; // Force O/P high
|
||||
TIM8->EGR = 1 ; // Restart
|
||||
|
||||
|
@ -517,7 +512,7 @@ static void init_pa7_dsm2()
|
|||
DMA2_Stream2->CR = DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_2 | DMA_SxCR_PL_0 | DMA_SxCR_MSIZE_0
|
||||
| DMA_SxCR_PSIZE_0 | DMA_SxCR_MINC | DMA_SxCR_DIR_0 | DMA_SxCR_PFCTRL ;
|
||||
DMA2_Stream2->PAR = CONVERT_PTR_UINT(&TIM8->DMAR);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]);
|
||||
// DMA2_Stream2->FCR = 0x05 ; //DMA_SxFCR_DMDIS | DMA_SxFCR_FTH_0 ;
|
||||
// DMA2_Stream2->NDTR = 100 ;
|
||||
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
|
@ -550,7 +545,7 @@ static void init_pa7_ppm()
|
|||
EXTERNAL_MODULE_ON();
|
||||
|
||||
// Timer1
|
||||
ppmStreamPtr[EXTERNAL_MODULE] = ppmStream[EXTERNAL_MODULE];
|
||||
modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses;
|
||||
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN ; // Enable portA clock
|
||||
configure_pins( PIN_EXTPPM_OUT, PIN_PERIPHERAL | PIN_PORTA | PIN_PER_3 | PIN_OS25) ;
|
||||
|
@ -561,7 +556,7 @@ static void init_pa7_ppm()
|
|||
// so it has to be called after the peripheral is enabled
|
||||
setupPulsesPPM(EXTERNAL_MODULE) ;
|
||||
|
||||
TIM8->ARR = *ppmStreamPtr[EXTERNAL_MODULE]++ ;
|
||||
TIM8->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
|
||||
TIM8->PSC = (PERI2_FREQUENCY * TIMER_MULT_APB2) / 2000000 - 1 ; // 0.5uS from 30MHz
|
||||
|
||||
TIM8->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE ; // PWM mode 1
|
||||
|
@ -603,23 +598,23 @@ extern "C" void TIM8_CC_IRQHandler()
|
|||
if (s_current_protocol[EXTERNAL_MODULE] == PROTO_PXX) {
|
||||
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
|
||||
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&pxxStream[EXTERNAL_MODULE][1]);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].pxx.pulses[1]);
|
||||
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
TIM8->CCR1 = pxxStream[EXTERNAL_MODULE][0];
|
||||
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].pxx.pulses[0];
|
||||
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
}
|
||||
#if defined(DSM2)
|
||||
else if (s_current_protocol[EXTERNAL_MODULE] >= PROTO_DSM2_LP45 && s_current_protocol[EXTERNAL_MODULE] <= PROTO_DSM2_DSMX) {
|
||||
DMA2_Stream2->CR &= ~DMA_SxCR_EN ; // Disable DMA
|
||||
DMA2->LIFCR = DMA_LIFCR_CTCIF2 | DMA_LIFCR_CHTIF2 | DMA_LIFCR_CTEIF2 | DMA_LIFCR_CDMEIF2 | DMA_LIFCR_CFEIF2 ; // Write ones to clear bits
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&dsm2Stream[1]);
|
||||
DMA2_Stream2->M0AR = CONVERT_PTR_UINT(&modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[1]);
|
||||
DMA2_Stream2->CR |= DMA_SxCR_EN ; // Enable DMA
|
||||
TIM8->CCR1 = dsm2Stream[0];
|
||||
TIM8->CCR1 = modulePulsesData[EXTERNAL_MODULE].dsm2.pulses[0];
|
||||
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
}
|
||||
#endif
|
||||
else if (s_current_protocol[EXTERNAL_MODULE] == PROTO_PPM) {
|
||||
ppmStreamPtr[EXTERNAL_MODULE] = ppmStream[EXTERNAL_MODULE];
|
||||
modulePulsesData[EXTERNAL_MODULE].ppm.ptr = modulePulsesData[EXTERNAL_MODULE].ppm.pulses;
|
||||
TIM8->DIER |= TIM_DIER_UDE ;
|
||||
TIM8->SR &= ~TIM_SR_UIF ; // Clear this flag
|
||||
TIM8->DIER |= TIM_DIER_UIE ; // Enable this interrupt
|
||||
|
@ -633,8 +628,8 @@ extern "C" void TIM8_UP_TIM13_IRQHandler()
|
|||
{
|
||||
TIM8->SR &= ~TIM_SR_UIF ; // Clear flag
|
||||
|
||||
TIM8->ARR = *ppmStreamPtr[EXTERNAL_MODULE]++ ;
|
||||
if (*ppmStreamPtr[EXTERNAL_MODULE] == 0) {
|
||||
TIM8->ARR = *modulePulsesData[EXTERNAL_MODULE].ppm.ptr++ ;
|
||||
if (*modulePulsesData[EXTERNAL_MODULE].ppm.ptr == 0) {
|
||||
TIM8->SR &= ~TIM_SR_CC2IF ; // Clear this flag
|
||||
TIM8->DIER |= TIM_DIER_CC2IE ; // Enable this interrupt
|
||||
}
|
||||
|
|
|
@ -36,8 +36,6 @@
|
|||
|
||||
#include "../../opentx.h"
|
||||
|
||||
uint16_t * TrainerPulsePtr;
|
||||
extern uint16_t ppmStream[NUM_MODULES+1][20];
|
||||
extern Fifo<32> sbusFifo;
|
||||
|
||||
#define setupTrainerPulses() setupPulsesPPM(TRAINER_MODULE)
|
||||
|
@ -45,7 +43,7 @@ extern Fifo<32> sbusFifo;
|
|||
// Trainer PPM oputput PC9, Timer 3 channel 4, (Alternate Function 2)
|
||||
void init_trainer_ppm()
|
||||
{
|
||||
TrainerPulsePtr = ppmStream[TRAINER_MODULE];
|
||||
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
|
||||
|
||||
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN ; // Enable portC clock
|
||||
configure_pins( PIN_TR_PPM_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25) ;
|
||||
|
@ -57,7 +55,7 @@ void init_trainer_ppm()
|
|||
// so it has to be called after the peripheral is enabled
|
||||
setupTrainerPulses() ;
|
||||
|
||||
TIM3->ARR = *TrainerPulsePtr++ ;
|
||||
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
|
||||
TIM3->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1 ; // 0.5uS
|
||||
TIM3->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2 | TIM_CCMR2_OC4PE ; // PWM mode 1
|
||||
TIM3->BDTR = TIM_BDTR_MOE ;
|
||||
|
@ -174,7 +172,7 @@ extern "C" void TIM3_IRQHandler()
|
|||
|
||||
setupTrainerPulses() ;
|
||||
|
||||
TrainerPulsePtr = ppmStream[TRAINER_MODULE];
|
||||
trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
|
||||
TIM3->DIER |= TIM_DIER_UDE ;
|
||||
TIM3->SR &= ~TIM_SR_UIF ; // Clear this flag
|
||||
TIM3->DIER |= TIM_DIER_UIE ; // Enable this interrupt
|
||||
|
@ -183,8 +181,8 @@ extern "C" void TIM3_IRQHandler()
|
|||
// PPM out update interrupt
|
||||
if ( (TIM3->DIER & TIM_DIER_UIE) && ( TIM3->SR & TIM_SR_UIF ) ) {
|
||||
TIM3->SR &= ~TIM_SR_UIF ; // Clear flag
|
||||
TIM3->ARR = *TrainerPulsePtr++ ;
|
||||
if ( *TrainerPulsePtr == 0 ) {
|
||||
TIM3->ARR = *trainerPulsesData.ppm.ptr++ ;
|
||||
if ( *trainerPulsesData.ppm.ptr == 0 ) {
|
||||
TIM3->SR &= ~TIM_SR_CC1IF ; // Clear this flag
|
||||
TIM3->DIER |= TIM_DIER_CC1IE ; // Enable this interrupt
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue