mirror of
https://github.com/opentx/opentx.git
synced 2025-07-16 21:05:26 +03:00
Audio + Haptic port from ersky9x
This commit is contained in:
bsongis
parent
f08e201045
commit
9a484408f6
13 changed files with 317 additions and 699 deletions
14
src/Makefile
14
src/Makefile
|
|
@ -134,8 +134,10 @@ endif
|
|||
ifeq ($(PCB), ARM)
|
||||
ifeq ($(PCBREV), REVA)
|
||||
CPPDEFS += -DREVA
|
||||
LDSCRIPT = ersky9x/sam3s2c_flash.ld
|
||||
else
|
||||
CPPDEFS += -DREVB
|
||||
LDSCRIPT = ersky9x/sam3s4c_flash.ld
|
||||
endif
|
||||
TRGT = arm-none-eabi-
|
||||
MCU = cortex-m3
|
||||
|
|
@ -260,23 +262,25 @@ ifeq ($(EEPROM_PROGRESS_BAR), YES)
|
|||
CPPDEFS += -DEEPROM_PROGRESS_BAR
|
||||
endif
|
||||
|
||||
RUN_FROM_FLASH = 1
|
||||
|
||||
ifeq ($(PCB), ARM)
|
||||
# V4 ARM, so ...
|
||||
OPT = 2
|
||||
CPPDEFS += -DPCBARM
|
||||
CPPDEFS += -DPCBARM -DAUDIO -DHAPTIC
|
||||
EXTRAINCDIRS += ersky9x
|
||||
BOARDSRC = board_ersky9x.cpp
|
||||
EXTRABOARDSRC = ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c
|
||||
EEPROMSRC = eeprom_arm.cpp
|
||||
PULSESSRC = pulses_arm.cpp
|
||||
CPPSRC += audio.cpp
|
||||
CPPSRC += ersky9x/sound.cpp
|
||||
CPPSRC += beeper.cpp
|
||||
endif
|
||||
|
||||
ifeq ($(PCB), V4)
|
||||
# V4 PCB, so ...
|
||||
OPT = 2
|
||||
CPPDEFS += -DPCBV4 -DAUDIO
|
||||
CPPDEFS += -DPCBV4 -DAUDIO -DHAPTIC
|
||||
EXTRAINCDIRS += gruvin9x
|
||||
BOARDSRC += board_gruvin9x.cpp
|
||||
EEPROMSRC = eeprom_avr.cpp
|
||||
|
|
@ -569,7 +573,7 @@ endif
|
|||
$(OBJDUMP) -h -S $< > $@
|
||||
|
||||
# Concatenate all sources files in one big file to optimize size
|
||||
allsrc.cpp: $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC)
|
||||
allsrc.cpp: Makefile $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC)
|
||||
@echo -n > allsrc.cpp
|
||||
for f in $(BOARDSRC) $(CPPSRC) $(EXTRABOARDSRC) ; do echo "# 1 \"$$f\"" >> allsrc.cpp; cat "$$f" >> allsrc.cpp; done
|
||||
|
||||
|
|
@ -582,7 +586,7 @@ ifeq ($(PCB), ARM)
|
|||
@echo
|
||||
@echo $(MSG_COMPILING) $@
|
||||
$(CC) $(ALL_CPPFLAGS) $< -o allsrc.o
|
||||
$(CC) allsrc.o -mcpu=cortex-m3 -mthumb -nostartfiles -Tersky9x/sam3s2c_flash.ld -Wl,-Map=$(TARGET).map,--cref,--no-warn-mismatch -o $@
|
||||
$(CC) allsrc.o -mcpu=cortex-m3 -mthumb -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref,--no-warn-mismatch -o $@
|
||||
else
|
||||
%.elf: allsrc.cpp
|
||||
@echo
|
||||
|
|
|
|||
|
|
@ -58,6 +58,50 @@ bool audioQueue::freeslots(uint8_t slots)
|
|||
// it is called every 10ms
|
||||
void audioQueue::heartbeat()
|
||||
{
|
||||
#if defined(PCBARM)
|
||||
if (toneTimeLeft) {
|
||||
|
||||
if (queueTone(toneFreq * 61 / 2, toneTimeLeft * 10,
|
||||
toneFreqIncr * 61 / 2)) {
|
||||
toneTimeLeft = 0; //time gets counted down
|
||||
}
|
||||
|
||||
//this works - but really needs a delay added in.
|
||||
// reason is because it takes time for the motor to spin up
|
||||
// need to take this into account when the tone sent is really short!
|
||||
// initial thoughts are a seconds queue to process haptic that gets
|
||||
// fired from here. end result is haptic events run for mix of 2 seconds?
|
||||
|
||||
#if defined(HAPTIC)
|
||||
if (toneHaptic) {
|
||||
hapticOn((g_eeGeneral.hapticStrength * 2) * 10);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
|
||||
hapticOff();
|
||||
|
||||
if (tonePause) {
|
||||
if (queueTone(0, tonePause * 10, 0)) {
|
||||
tonePause = 0; //time gets counted down
|
||||
}
|
||||
}
|
||||
else {
|
||||
if (t_queueRidx != t_queueWidx) {
|
||||
toneFreq = queueToneFreq[t_queueRidx];
|
||||
toneTimeLeft = queueToneLength[t_queueRidx];
|
||||
toneFreqIncr = queueToneFreqIncr[t_queueRidx];
|
||||
tonePause = queueTonePause[t_queueRidx];
|
||||
toneHaptic = queueToneHaptic[t_queueRidx];
|
||||
hapticTick = 0;
|
||||
if (!queueToneRepeat[t_queueRidx]--) {
|
||||
t_queueRidx = (t_queueRidx + 1) % AUDIO_QUEUE_LENGTH;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#else
|
||||
if (toneTimeLeft > 0) {
|
||||
#if defined(PCBV4)
|
||||
if (toneFreq) {
|
||||
|
|
@ -100,6 +144,7 @@ void audioQueue::heartbeat()
|
|||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
inline uint8_t audioQueue::getToneLength(uint8_t tLen)
|
||||
|
|
|
|||
|
|
@ -41,6 +41,10 @@
|
|||
#define PCBSTD
|
||||
#endif
|
||||
|
||||
#if defined(PCBARM)
|
||||
#include "ersky9x/sound.h"
|
||||
#endif
|
||||
|
||||
#if defined(PCBSTD)
|
||||
#define SPEAKER_ON BUZZER_ON
|
||||
#define SPEAKER_OFF BUZZER_OFF
|
||||
|
|
|
|||
|
|
@ -466,10 +466,11 @@ inline void init_adc()
|
|||
PMC->PMC_PCER0 |= 0x20000000L ; // Enable peripheral clock to ADC
|
||||
padc = ADC ;
|
||||
padc->ADC_MR = 0x14110000 | timer ; // 0001 0100 0001 0001 xxxx xxxx 0000 0000
|
||||
padc->ADC_ACR = ADC_ACR_TSON ; // Turn on temp sensor
|
||||
#ifdef REVB
|
||||
padc->ADC_CHER = 0x0000633E ; // channels 1,2,3,4,5,8,9,13,14
|
||||
padc->ADC_CHER = 0x0000E33E ; // channels 1,2,3,4,5,8,9,13,14,15
|
||||
#else
|
||||
padc->ADC_CHER = 0x0000623E ; // channels 1,2,3,4,5,9,13,14
|
||||
padc->ADC_CHER = 0x0000E23E ; // channels 1,2,3,4,5,9,13,14,15
|
||||
#endif
|
||||
padc->ADC_CGR = 0 ; // Gain = 1, all channels
|
||||
padc->ADC_COR = 0 ; // Single ended, 0 offset, all channels
|
||||
|
|
@ -547,7 +548,9 @@ void init_pwm()
|
|||
pwmptr->PWM_CH_NUM[2].PWM_CPDRUPD = 100 ; // Period
|
||||
pwmptr->PWM_CH_NUM[2].PWM_CDTY = 40 ; // Duty
|
||||
pwmptr->PWM_CH_NUM[2].PWM_CDTYUPD = 40 ; // Duty
|
||||
pwmptr->PWM_ENA = PWM_ENA_CHID2 ; // Enable channel 2
|
||||
pwmptr->PWM_OOV &= ~0x00040000 ; // Force low
|
||||
pwmptr->PWM_OSS = 0x00040000 ; // Force low
|
||||
// pwmptr->PWM_ENA = PWM_ENA_CHID2 ; // Enable channel 2 // TODO on REVA?
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -947,6 +950,7 @@ extern uint32_t keyState(EnumKeys enuk)
|
|||
}
|
||||
|
||||
uint16_t Analog_values[NUMBER_ANALOG] ;
|
||||
uint16_t Temperature ; // Raw temp reading
|
||||
|
||||
// Read 8 (9 for REVB) ADC channels
|
||||
// Documented bug, must do them 1 by 1
|
||||
|
|
@ -960,7 +964,7 @@ void read_9_adc()
|
|||
|
||||
padc = ADC;
|
||||
y = padc->ADC_ISR; // Clear EOC flags
|
||||
for (y = NUMBER_ANALOG; --y > 0;) {
|
||||
for (y = NUMBER_ANALOG+1; --y > 0;) {
|
||||
padc->ADC_CR = 2; // Start conversion
|
||||
x = 0;
|
||||
while ((padc->ADC_ISR & 0x01000000) == 0) {
|
||||
|
|
@ -980,10 +984,13 @@ void read_9_adc()
|
|||
Analog_values[5] = ADC->ADC_CDR9;
|
||||
Analog_values[6] = ADC->ADC_CDR13;
|
||||
Analog_values[7] = ADC->ADC_CDR14;
|
||||
|
||||
#ifdef REVB
|
||||
Analog_values[8] = ADC->ADC_CDR8 ;
|
||||
#endif
|
||||
|
||||
Temperature = ( Temperature * 7 + ADC->ADC_CDR15 ) >> 3 ; // Filter it
|
||||
|
||||
// Power save
|
||||
// PMC->PMC_PCER0 &= ~0x20000000L ; // Disable peripheral clock to ADC
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,8 @@
|
|||
#ifdef REVA
|
||||
#include "ersky9x/AT91SAM3S2.h"
|
||||
#else
|
||||
#include "ersky9x/AT91SAM3S4.h"
|
||||
#endif
|
||||
|
||||
#define PIN_ENABLE 0x001
|
||||
#define PIN_PERIPHERAL 0x000
|
||||
|
|
@ -22,3 +26,5 @@
|
|||
#define PIN_HIGH 0x100
|
||||
|
||||
void configure_pins( uint32_t pins, uint16_t config );
|
||||
|
||||
extern uint16_t Temperature ; // Raw temp reading
|
||||
|
|
|
|||
|
|
@ -720,7 +720,7 @@ typedef struct {
|
|||
|
||||
#define DACC_MR_TRGSEL (0x7 << 1) /**< \brief (DACC_MR) Trigger Selection */
|
||||
#define DACC_MR_TRGSEL_EXT_TRIG (0x0 << 1) // (DACC_MR) External trigger
|
||||
#define DACC_MR_TRGSEL_TIOA_0 (0x1 << 1) // (DACC_MR) TIO Output of the rTimer Counter Channel 0
|
||||
#define DACC_MR_TRGSEL_TIOA_0 (0x1 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 0
|
||||
#define DACC_MR_TRGSEL_TIOA_1 (0x2 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 1
|
||||
#define DACC_MR_TRGSEL_TIOA_2 (0x3 << 1) // (DACC_MR) TIO Output of the Timer Counter Channel 2
|
||||
#define DACC_MR_TRGSEL_PWM_0 (0x4 << 1) // (DACC_MR) PWM Event Line 0
|
||||
|
|
@ -6747,9 +6747,9 @@ typedef struct {
|
|||
#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */
|
||||
|
||||
// indices for three pio structures
|
||||
#define iPIOA 0
|
||||
#define iPIOB 1
|
||||
#define iPIOC 2
|
||||
#define iPIOA 0
|
||||
#define iPIOB 1
|
||||
#define iPIOC 2
|
||||
/*@}*/
|
||||
|
||||
/* ***************************************************************************** */
|
||||
|
|
|
|||
|
|
@ -207,8 +207,8 @@ typedef struct {
|
|||
typedef struct {
|
||||
WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */
|
||||
RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */
|
||||
RwReg ADC_SEQ1R; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */
|
||||
RwReg ADC_SEQ2R; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */
|
||||
RwReg ADC_SEQR1; /**< \brief (Adc Offset: 0x08) Channel Sequence 1Register */
|
||||
RwReg ADC_SEQR2; /**< \brief (Adc Offset: 0x0C) Channel Sequence 2 Register */
|
||||
WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */
|
||||
WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */
|
||||
RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */
|
||||
|
|
@ -1322,6 +1322,7 @@ typedef struct {
|
|||
RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */
|
||||
RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */
|
||||
RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */
|
||||
RwReg Reserved14[38];
|
||||
} Pio;
|
||||
#endif /* __ASSEMBLY__ */
|
||||
/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */
|
||||
|
|
@ -3239,8 +3240,8 @@ typedef struct {
|
|||
RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */
|
||||
RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */
|
||||
RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */
|
||||
RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */
|
||||
RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */
|
||||
RwReg PWM_CPDR; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */
|
||||
RwReg PWM_CPDRUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */
|
||||
RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */
|
||||
RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */
|
||||
RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */
|
||||
|
|
@ -6744,6 +6745,11 @@ typedef struct {
|
|||
#define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */
|
||||
#define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */
|
||||
#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */
|
||||
|
||||
// indices for three pio structures
|
||||
#define iPIOA 0
|
||||
#define iPIOB 1
|
||||
#define iPIOC 2
|
||||
/*@}*/
|
||||
|
||||
/* ***************************************************************************** */
|
||||
|
|
|
|||
|
|
@ -1,667 +0,0 @@
|
|||
/* ----------------------------------------------------------------------------
|
||||
* ATMEL Microcontroller Software Support
|
||||
* ----------------------------------------------------------------------------
|
||||
* Copyright (c) 2009, Atmel Corporation
|
||||
*
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the disclaimer below.
|
||||
*
|
||||
* Atmel's name may not be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* ----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/**
|
||||
* \page sam3s_ek_board_desc "SAM3S-EK - Board Description"
|
||||
*
|
||||
* \section
|
||||
* A file is dedicated to descibe the AT91SAM3S-EK board.
|
||||
*
|
||||
* \section Contents
|
||||
* - The code for booting the board is provided by board_cstartup.S and
|
||||
* board_lowlevel.c.
|
||||
* - For using board PIOs, board characteristics (clock, etc.) and external
|
||||
* components, see board.h.
|
||||
* - For manipulating memories (remapping, SDRAM, etc.), see board_memories.h.
|
||||
*
|
||||
* To get more software details and the full list of parameters related to the
|
||||
* SAM3S-EK board configuration, please have a look at the source file: \n
|
||||
* \ref board.h\n
|
||||
*
|
||||
* This file can be used as a template and modified to fit a custom board, with
|
||||
* specific PIOs usage or memory connections.
|
||||
**/
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \file board.h
|
||||
///
|
||||
/// \par Purpose
|
||||
///
|
||||
/// Definition of AT91SAM3S-EK characteristics, AT91SAM3S-dependant PIOs and
|
||||
/// external components interfacing.
|
||||
///
|
||||
/// \par Usage
|
||||
/// -# For operating frequency information, see "SAM3S-EK - Operating frequencies".
|
||||
/// -# For using portable PIO definitions, see "SAM3S-EK - PIO definitions".
|
||||
/// -# Several USB definitions are included here (see "SAM3S-EK - USB device").
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Headers
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/* These headers were introduced in C99 by working group ISO/IEC JTC1/SC22/WG14. */
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#if defined(at91sam3s4)
|
||||
#include "chip.h"
|
||||
#include "AT91SAM3S4.h"
|
||||
#else
|
||||
#error Board does not support the specified chip.
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par
|
||||
/// This page lists several definition related to the board description.
|
||||
///
|
||||
/// Definitions
|
||||
/// - BOARD_NAME
|
||||
|
||||
/// Name of the board.
|
||||
#define BOARD_NAME "AT91SAM3S-EK"
|
||||
/// Board definition.
|
||||
#define at91sam3sek
|
||||
/// Family definition (already defined).
|
||||
#define at91sam3s
|
||||
/// Core definition
|
||||
#define cortexm3
|
||||
|
||||
//#define BOARD_REV_A
|
||||
#define BOARD_REV_B
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies"
|
||||
/// This page lists several definition related to the board operating frequency
|
||||
/// (when using the initialization done by board_lowlevel.c).
|
||||
///
|
||||
/// !Definitions
|
||||
/// - BOARD_MAINOSC
|
||||
/// - BOARD_MCK
|
||||
|
||||
/// Frequency of the board main oscillator.
|
||||
#define BOARD_MAINOSC 12000000
|
||||
|
||||
/// Master clock frequency (when using board_lowlevel.c).
|
||||
//#define BOARD_MCK 48000000
|
||||
#define BOARD_MCK 64000000
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ADC
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/// Startup time max, return from Idle mode (in µs)
|
||||
#define ADC_STARTUP_TIME_MAX 15
|
||||
/// Track and hold Acquisition Time min (in ns)
|
||||
#define ADC_TRACK_HOLD_TIME_MIN 1200
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
|
||||
//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
|
||||
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions"
|
||||
/// This pages lists all the pio definitions contained in board.h. The constants
|
||||
/// are named using the following convention: PIN_* for a constant which defines
|
||||
/// a single Pin instance (but may include several PIOs sharing the same
|
||||
/// controller), and PINS_* for a list of Pin instances.
|
||||
///
|
||||
/// !ADC
|
||||
/// - PIN_ADC0_AD0
|
||||
/// - PIN_ADC0_AD1
|
||||
/// - PIN_ADC0_AD2
|
||||
/// - PIN_ADC0_AD3
|
||||
/// - PIN_ADC0_AD4
|
||||
/// - PIN_ADC0_AD5
|
||||
/// - PIN_ADC0_AD6
|
||||
/// - PIN_ADC0_AD7
|
||||
/// - PINS_ADC0
|
||||
///
|
||||
/// !UART
|
||||
/// - PINS_UART
|
||||
///
|
||||
/// !EBI
|
||||
/// - PIN_EBI_DATA_BUS
|
||||
/// - PIN_EBI_NCS0
|
||||
/// - PIN_EBI_NRD
|
||||
/// - PIN_EBI_NWE
|
||||
/// - PIN_EBI_ADDR_BUS
|
||||
/// - PIN_EBI_PSRAM_NBS
|
||||
/// - PIN_EBI_A1
|
||||
/// - PIN_EBI_LCD_RS
|
||||
///
|
||||
/// !LEDs
|
||||
/// - PIN_LED_0
|
||||
/// - PIN_LED_1
|
||||
/// - PIN_LED_2
|
||||
/// - PINS_LEDS
|
||||
///
|
||||
/// !MCI
|
||||
/// - PINS_MCI
|
||||
///
|
||||
/// !Push buttons
|
||||
/// - PIN_PUSHBUTTON_1
|
||||
/// - PIN_PUSHBUTTON_2
|
||||
/// - PINS_PUSHBUTTONS
|
||||
/// - PUSHBUTTON_BP1
|
||||
/// - PUSHBUTTON_BP2
|
||||
///
|
||||
/// !PWMC
|
||||
/// - PIN_PWMC_PWMH0
|
||||
/// - PIN_PWMC_PWML0
|
||||
/// - PIN_PWMC_PWMH1
|
||||
/// - PIN_PWMC_PWML1
|
||||
/// - PIN_PWMC_PWMH2
|
||||
/// - PIN_PWMC_PWML2
|
||||
/// - PIN_PWMC_PWMH3
|
||||
/// - PIN_PWMC_PWML3
|
||||
/// - PIN_PWM_LED0
|
||||
/// - PIN_PWM_LED1
|
||||
/// - PIN_PWM_LED2
|
||||
/// - CHANNEL_PWM_LED0
|
||||
/// - CHANNEL_PWM_LED1
|
||||
/// - CHANNEL_PWM_LED2
|
||||
///
|
||||
/// !SPI
|
||||
/// - PIN_SPI_MISO
|
||||
/// - PIN_SPI_MOSI
|
||||
/// - PIN_SPI_SPCK
|
||||
/// - PINS_SPI
|
||||
/// - PIN_SPI_NPCS0_PA11
|
||||
///
|
||||
/// ! SSC
|
||||
/// - PIN_SSC_TD
|
||||
/// - PIN_SSC_TK
|
||||
/// - PIN_SSC_TF
|
||||
/// - PINS_SSC_CODEC
|
||||
///
|
||||
/// ! PCK0
|
||||
/// - PIN_PCK0
|
||||
///
|
||||
/// !TWI
|
||||
/// - PIN_TWI_TWD0
|
||||
/// - PIN_TWI_TWCK0
|
||||
/// - PINS_TWI
|
||||
///
|
||||
/// !USART0
|
||||
/// - PIN_USART0_RXD
|
||||
/// - PIN_USART0_TXD
|
||||
/// - PIN_USART0_CTS
|
||||
/// - PIN_USART0_RTS
|
||||
/// - PIN_USART0_SCK
|
||||
///
|
||||
/// !USB
|
||||
/// - PIN_USB_PULLUP
|
||||
///
|
||||
|
||||
/// ADC_AD0 pin definition.
|
||||
#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD1 pin definition.
|
||||
#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD2 pin definition.
|
||||
#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD3 pin definition.
|
||||
#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD4 pin definition.
|
||||
#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD5 pin definition.
|
||||
#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD6 pin definition.
|
||||
#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD7 pin definition.
|
||||
#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/// Pins ADC
|
||||
#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
|
||||
|
||||
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
|
||||
#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// EBI
|
||||
#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
|
||||
{1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */
|
||||
#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */
|
||||
|
||||
#ifdef BOARD_REV_A
|
||||
/** LED #0 pin definition. */
|
||||
#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #1 pin definition. */
|
||||
#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #2 pin definition. */
|
||||
#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
/** LED #0 pin definition. */
|
||||
#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #1 pin definition. */
|
||||
#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #2 pin definition. */
|
||||
#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
#endif
|
||||
|
||||
/** List of all LEDs definitions. */
|
||||
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
||||
|
||||
/// MCI pins definition.
|
||||
#define PINS_MCI {0x1f8, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_PULLUP}, \
|
||||
{1 << 3, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// MCI pin Card Detect
|
||||
#define PIN_MCI_CD \
|
||||
{AT91C_PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */
|
||||
#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||
/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */
|
||||
#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||
/** List of all push button definitions. */
|
||||
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
||||
|
||||
/** Push button #1 index. */
|
||||
#define PUSHBUTTON_BP1 0
|
||||
/** Push button #2 index. */
|
||||
#define PUSHBUTTON_BP2 1
|
||||
|
||||
/// Simulated joystick LEFT index.
|
||||
#define JOYSTICK_LEFT 0
|
||||
/// Simulated joystick RIGHT index.
|
||||
#define JOYSTICK_RIGHT 1
|
||||
|
||||
/** PWMC PWM0 pin definition. */
|
||||
#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM1 pin definition. */
|
||||
#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM2 pin definition. */
|
||||
#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWMC PWM3 pin definition. */
|
||||
#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWM pin definition for LED0 */
|
||||
#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0
|
||||
/** PWM pin definition for LED1 */
|
||||
#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2
|
||||
/** PWM pin definition for LED2 */
|
||||
#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3
|
||||
/** PWM channel for LED0 */
|
||||
#define CHANNEL_PWM_LED0 0
|
||||
/** PWM channel for LED1 */
|
||||
#define CHANNEL_PWM_LED1 2
|
||||
/** PWM channel for LED2 */
|
||||
#define CHANNEL_PWM_LED2 3
|
||||
|
||||
/** SPI MISO pin definition. */
|
||||
#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI MOSI pin definition. */
|
||||
#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI SPCK pin definition. */
|
||||
#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI chip select pin definition. */
|
||||
#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
|
||||
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
|
||||
|
||||
/// SSC pins definition.
|
||||
#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
||||
|
||||
/// PCK0
|
||||
#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
|
||||
/// TWI pins definition.
|
||||
#define TWI_V3XX
|
||||
#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
||||
#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
||||
|
||||
/// USART0
|
||||
#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// USART1
|
||||
#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
|
||||
|
||||
|
||||
/// USB VBus monitoring pin definition.
|
||||
#ifdef BOARD_REV_A
|
||||
#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the AT91SAM3S-EK.
|
||||
///
|
||||
/// !AT45 Dataflash Card
|
||||
/// - BOARD_AT45_A_SPI_BASE
|
||||
/// - BOARD_AT45_A_SPI_ID
|
||||
/// - BOARD_AT45_A_SPI_PINS
|
||||
/// - BOARD_AT45_A_SPI
|
||||
/// - BOARD_AT45_A_NPCS
|
||||
/// - BOARD_AT45_A_NPCS_PIN
|
||||
///
|
||||
/// !AT45 Dataflash (serial onboard DataFlash)
|
||||
/// - BOARD_AT45_B_SPI_BASE
|
||||
/// - BOARD_AT45_B_SPI_ID
|
||||
/// - BOARD_AT45_B_SPI_PINS
|
||||
/// - BOARD_AT45_B_SPI
|
||||
/// - BOARD_AT45_B_NPCS
|
||||
/// - BOARD_AT45_B_NPCS_PIN
|
||||
///
|
||||
/// !AT26 Serial Flash
|
||||
/// - BOARD_AT26_A_SPI_BASE
|
||||
/// - BOARD_AT26_A_SPI_ID
|
||||
/// - BOARD_AT26_A_SPI_PINS
|
||||
/// - BOARD_AT26_A_SPI
|
||||
/// - BOARD_AT26_A_NPCS
|
||||
/// - BOARD_AT26_A_NPCS_PIN
|
||||
///
|
||||
/// !SD Card
|
||||
/// - MCI2_INTERFACE
|
||||
/// - BOARD_SD_MCI_BASE
|
||||
/// - BOARD_SD_MCI_ID
|
||||
/// - BOARD_SD_PINS
|
||||
/// - BOARD_SD_SLOT
|
||||
///
|
||||
/// !PSRAM
|
||||
/// - BOARD_PSRAM_PINS
|
||||
///
|
||||
/// !LCD
|
||||
/// - BOARD_LCD_ILI9325
|
||||
/// - BOARD_LCD_PINS
|
||||
/// - BOARD_BACKLIGHT_PIN
|
||||
/// - BOARD_LCD_BASE
|
||||
/// - BOARD_LCD_RS
|
||||
/// - BOARD_LCD_WIDTH
|
||||
/// - BOARD_LCD_HEIGHT
|
||||
///
|
||||
/// !TouchScreen
|
||||
/// - BOARD_TSC_ADS7843
|
||||
/// - PIN_TCS_IRQ
|
||||
/// - PIN_TCS_BUSY
|
||||
/// - BOARD_TSC_SPI_BASE
|
||||
/// - BOARD_TSC_SPI_ID
|
||||
/// - BOARD_TSC_SPI_PINS
|
||||
/// - BOARD_TSC_NPCS
|
||||
/// - BOARD_TSC_NPCS_PIN
|
||||
///
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_BASE SPI0
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_ID ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_A_SPI 0
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_BASE SPI1
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_ID ID_SPI1
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_B_SPI 1
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_BASE SPI0
|
||||
///// Identifier of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_ID ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
|
||||
///// Serialflash SPI number.
|
||||
//#define BOARD_AT26_A_SPI 0
|
||||
///// Chip select connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS 3
|
||||
///// Chip select pin connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// ISO7816
|
||||
/// - PIN_SMARTCARD_CONNECT
|
||||
/// - PIN_ISO7816_RSTMC
|
||||
/// - PINS_ISO7816
|
||||
|
||||
/// Smartcard detection pin
|
||||
//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// PIN used for reset the smartcard
|
||||
//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// Pins used for connect the smartcard
|
||||
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
|
||||
|
||||
/// Dma channel number
|
||||
#define BOARD_MCI_DMA_CHANNEL 0
|
||||
/// MCI0 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
|
||||
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
|
||||
/// MCI1 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
|
||||
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
|
||||
/// SD DMA hardware handshaking ID
|
||||
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
|
||||
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
|
||||
|
||||
|
||||
/// HS MCI interface
|
||||
#define MCI2_INTERFACE
|
||||
/// Base address of the MCI peripheral connected to the SD card.
|
||||
#define BOARD_SD_MCI_BASE MCI0//MCI
|
||||
///// Peripheral identifier of the MCI connected to the SD card.
|
||||
#define BOARD_SD_MCI_ID ID_MCI0 //ID_MCI
|
||||
///// MCI pins that shall be configured to access the SD card.
|
||||
#define BOARD_SD_PINS PINS_MCI
|
||||
///// MCI slot to which the SD card is connected to.
|
||||
#define BOARD_SD_SLOT MCI_SD_SLOTA
|
||||
///// MCI Card Detect pin.
|
||||
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
||||
|
||||
/*
|
||||
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
|
||||
*/
|
||||
|
||||
/** Indicates board has an ILI9325 external component to manage LCD. */
|
||||
#define BOARD_LCD_ILI9325
|
||||
|
||||
/** LCD pins definition. */
|
||||
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_NCS1, PIN_EBI_LCD_RS
|
||||
/** Backlight pin definition. */
|
||||
#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/** Define ILI9325 base address. */
|
||||
#define BOARD_LCD_BASE 0x61000000
|
||||
/** Define ILI9325 register select signal. */
|
||||
#define BOARD_LCD_RS (1 << 1)
|
||||
/** Display width in pixels. */
|
||||
#define BOARD_LCD_WIDTH 240
|
||||
/** Display height in pixels. */
|
||||
#define BOARD_LCD_HEIGHT 320
|
||||
|
||||
/** Indicates board has an ADS7843 external component to manage Touch Screen */
|
||||
#define BOARD_TSC_ADS7843
|
||||
|
||||
#ifdef BOARD_REV_A
|
||||
/** Touchscreen controller IRQ pin definition. */
|
||||
#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||
#define PIN_TCS_IRQ_WUP_ID (1 << 3)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
/** Touchscreen controller IRQ pin definition. */
|
||||
#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||
#define PIN_TCS_IRQ_WUP_ID (1 << 15)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
/** Base address of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_BASE SPI
|
||||
/** Identifier of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_ID ID_SPI
|
||||
/** Pins of the SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_PINS PINS_SPI
|
||||
/** Chip select connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS 0
|
||||
/** Chip select pin connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_mem "SAM3S-EK - Memories"
|
||||
/// This page lists definitions related to internal & external on-board memories.
|
||||
///
|
||||
/// !Embedded Flash
|
||||
/// - BOARD_FLASH_EFC
|
||||
|
||||
/// Internal SRAM address
|
||||
#define AT91C_ISRAM AT91C_IRAM
|
||||
#define AT91C_ISRAM_SIZE 0x00008000
|
||||
|
||||
#define AT91C_IFLASH_SIZE (0x40000)
|
||||
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
|
||||
#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512
|
||||
#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes
|
||||
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \section sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the SAM3S-EK.
|
||||
///
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition"
|
||||
/// This page lists the definitions related to different chip's definition
|
||||
/// located in the board.h file for the SAM3S-EK.
|
||||
|
||||
/// DBGU
|
||||
#define BOARD_DBGU_ID ID_DBGU
|
||||
|
||||
/// Rtc
|
||||
#define BOARD_RTC_ID ID_RTC
|
||||
|
||||
/// Twi eeprom
|
||||
#define BOARD_ID_TWI_EEPROM ID_TWI1
|
||||
#define BOARD_BASE_TWI_EEPROM TWI1
|
||||
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
||||
|
||||
/// USART
|
||||
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
||||
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
||||
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
||||
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
||||
#define BOARD_PIN_USART_EN PIN_USART1_EN
|
||||
#define BOARD_USART_BASE USART1
|
||||
#define BOARD_ID_USART ID_USART1
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
/// Nandflash chip enable pin definition.
|
||||
#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/// Nandflash ready/busy pin definition.
|
||||
#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/// Nandflash controller peripheral pins definition.
|
||||
#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \
|
||||
PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
||||
|
||||
/// Address for transferring command bytes to the nandflash.
|
||||
#define BOARD_NF_COMMAND_ADDR 0x60400000
|
||||
/// Address for transferring address bytes to the nandflash.
|
||||
#define BOARD_NF_ADDRESS_ADDR 0x60200000
|
||||
/// Address for transferring data bytes to the nandflash.
|
||||
#define BOARD_NF_DATA_ADDR 0x60000000
|
||||
|
||||
#endif //#ifndef BOARD_H
|
||||
|
||||
|
|
@ -39,7 +39,7 @@
|
|||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
#include "board.h"
|
||||
//#include "board.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Local definitions
|
||||
|
|
|
|||
144
src/ersky9x/sam3s4c_flash.ld
Normal file
144
src/ersky9x/sam3s4c_flash.ld
Normal file
|
|
@ -0,0 +1,144 @@
|
|||
/****************************************************************************
|
||||
* Copyright (c) 2011 by Michael Fischer. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the author nor the names of its contributors may
|
||||
* be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
*****************************************************************************
|
||||
* History:
|
||||
*
|
||||
* 22.05.2011 mifi First Version
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
/*
|
||||
* In this linker script there is no heap available.
|
||||
* The stack start at the end of the ram segment.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* Take a look in the "The GNU linker" manual, here you get
|
||||
* the following information about the "MEMORY":
|
||||
*
|
||||
* "The MEMORY command describes the location and size of
|
||||
* blocks of memory in the target."
|
||||
*/
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00400000, LENGTH = 256K
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 48K
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* And the "SECTION" is used for:
|
||||
*
|
||||
* "The SECTIONS command tells the linker how to map input
|
||||
* sections into output sections, and how to place the output
|
||||
* sections in memory.
|
||||
*/
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
/*
|
||||
* The ".text" section is used for the code, and
|
||||
* read only (.rodata) data. Even the vectors (.vectors)
|
||||
* MUST be saved at the start of this section.
|
||||
*/
|
||||
.text :
|
||||
{
|
||||
_stext = .; /* Provide the name for the start of this section */
|
||||
|
||||
CREATE_OBJECT_SYMBOLS
|
||||
KEEP(*(.vectors))
|
||||
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
|
||||
. = ALIGN(4); /* Align the start of the exidx part */
|
||||
*(.ARM.exidx)
|
||||
*(.ARM.exidx.*)
|
||||
|
||||
. = ALIGN(4); /* Align the start of the rodata part */
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
|
||||
. = ALIGN(4); /* Align the end of the section */
|
||||
} > FLASH = 0
|
||||
_etext = .; /* Provide the name for the end of this section */
|
||||
|
||||
|
||||
/*
|
||||
* The ".data" section is used for initialized data
|
||||
* and for functions (.fastrun) which should be copied
|
||||
* from flash to ram. This functions will later be
|
||||
* executed from ram instead of flash.
|
||||
*/
|
||||
.data : AT (_etext)
|
||||
{
|
||||
. = ALIGN(4); /* Align the start of the section */
|
||||
_sdata = .; /* Provide the name for the start of this section */
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
|
||||
. = ALIGN(4); /* Align the start of the fastrun part */
|
||||
*(.fastrun)
|
||||
*(.fastrun.*)
|
||||
|
||||
. = ALIGN(4); /* Align the end of the section */
|
||||
} > RAM
|
||||
_edata = .; /* Provide the name for the end of this section */
|
||||
|
||||
|
||||
/*
|
||||
* The ".bss" section is used for uninitialized data.
|
||||
* This section will be cleared by the startup code.
|
||||
*/
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4); /* Align the start of the section */
|
||||
_sbss = .; /* Provide the name for the start of this section */
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
|
||||
. = ALIGN(4); /* Align the end of the section */
|
||||
} > RAM
|
||||
_ebss = .; /* Provide the name for the end of this section */
|
||||
|
||||
|
||||
/*
|
||||
* The ".stack" section is our stack.
|
||||
* Here this section starts at the end of the ram segment.
|
||||
*/
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
}
|
||||
|
||||
/*** EOF **/
|
||||
|
||||
|
|
@ -55,11 +55,13 @@ volatile uint8_t Buzzer_count ;
|
|||
|
||||
struct t_sound_globals
|
||||
{
|
||||
uint32_t Freq ;
|
||||
uint32_t Sound_time ;
|
||||
uint32_t Next_freq ;
|
||||
volatile uint32_t Sound_time ;
|
||||
uint32_t Frequency ;
|
||||
volatile uint32_t Tone_timer ; // Modified in interrupt routine
|
||||
volatile uint8_t Tone_ms_timer ;
|
||||
uint32_t Frequency_increment ;
|
||||
uint32_t Next_frequency_increment ;
|
||||
} Sound_g ;
|
||||
|
||||
|
||||
|
|
@ -97,9 +99,9 @@ const uint16_t PianoTones[] =
|
|||
28, 29, 31, 33, 35, 37, 39, 41, 44, 46,
|
||||
49, 52, 55, 58, 62, 65, 69, 73, 78, 82,
|
||||
87, 92, 98, 104, 110, 117, 123, 131, 139, 147,
|
||||
156, 165, 175, 185, 196, 208, 220, 233, 247, 262,
|
||||
277, 294, 311, 330, 349, 370, 392, 415, 440, 466,
|
||||
494, 523, 554, 587, 622, 659, 698, 740, 784, 831,
|
||||
156, 165, 175, 185, 196, 208, 220, 233, 247, 262, // d#, E, F, f#, G, g#, A, a#, B, C(middle)
|
||||
277, 294, 311, 330, 349, 370, 392, 415, 440, 466, // c#, D, d#, E, F, f#, G, g#, A, a#
|
||||
494, 523, 554, 587, 622, 659, 698, 740, 784, 831, // B, C, c#, D, d#, E, F, f#, G, g#
|
||||
880, 932, 988, 1047, 1109, 1175, 1245, 1319, 1397, 1480,
|
||||
1568, 1661, 1760, 1865, 1976, 2093, 2217, 2349, 2489, 2637,
|
||||
2794, 2960, 3136, 3322, 3520 ,3729, 3951, 4186
|
||||
|
|
@ -162,7 +164,6 @@ void set_frequency( uint32_t frequency )
|
|||
register Tc *ptc ;
|
||||
register uint32_t timer ;
|
||||
|
||||
Sound_g.Frequency = frequency ;
|
||||
timer = Master_frequency / (800 * frequency) ; // MCK/8 and 100 000 Hz
|
||||
if ( timer > 65535 )
|
||||
{
|
||||
|
|
@ -279,11 +280,17 @@ void sound_5ms()
|
|||
if ( Sound_g.Sound_time )
|
||||
{
|
||||
Sound_g.Tone_ms_timer = ( Sound_g.Sound_time + 4 ) / 5 ;
|
||||
if ( Sound_g.Freq ) // 0 => silence for time
|
||||
if ( Sound_g.Next_freq ) // 0 => silence for time
|
||||
{
|
||||
set_frequency( Sound_g.Freq ) ;
|
||||
Sound_g.Frequency = Sound_g.Next_freq ;
|
||||
Sound_g.Frequency_increment = Sound_g.Next_frequency_increment ;
|
||||
set_frequency( Sound_g.Frequency ) ;
|
||||
tone_start( 0 ) ;
|
||||
}
|
||||
else
|
||||
{
|
||||
DACC->DACC_IDR = DACC_IDR_ENDTX ; // Silence
|
||||
}
|
||||
Sound_g.Sound_time = 0 ;
|
||||
}
|
||||
else
|
||||
|
|
@ -292,18 +299,41 @@ void sound_5ms()
|
|||
Sound_g.Tone_timer = 0 ;
|
||||
}
|
||||
}
|
||||
else if ( ( Sound_g.Tone_ms_timer & 1 ) == 0 ) // Every 10 mS
|
||||
{
|
||||
if ( Sound_g.Frequency )
|
||||
{
|
||||
if ( Sound_g.Frequency_increment )
|
||||
{
|
||||
Sound_g.Frequency += Sound_g.Frequency_increment ;
|
||||
set_frequency( Sound_g.Frequency ) ;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// frequency in Hz, time in mS
|
||||
void playTone( uint32_t frequency, uint32_t time )
|
||||
{
|
||||
Sound_g.Freq = frequency ;
|
||||
Sound_g.Next_frequency_increment = 0 ;
|
||||
Sound_g.Next_freq = frequency ;
|
||||
Sound_g.Sound_time = time ;
|
||||
// set_frequency( frequency ) ;
|
||||
// Tone_ms_timer = ( time + 4 ) / 5 ;
|
||||
// tone_start( 0 ) ;
|
||||
}
|
||||
|
||||
uint32_t queueTone( uint32_t frequency, uint32_t time, uint32_t frequency_increment )
|
||||
{
|
||||
if ( Sound_g.Sound_time == 0 )
|
||||
{
|
||||
Sound_g.Next_freq = frequency ;
|
||||
Sound_g.Next_frequency_increment = frequency_increment ;
|
||||
Sound_g.Sound_time = time ;
|
||||
return 1 ;
|
||||
}
|
||||
return 0 ;
|
||||
}
|
||||
|
||||
// Time is in milliseconds
|
||||
void tone_start( register uint32_t time )
|
||||
|
|
@ -394,10 +424,41 @@ extern "C" void TWI0_IRQHandler()
|
|||
}
|
||||
|
||||
|
||||
void audioDefevent(uint8_t e)
|
||||
//void audioDefevent(uint8_t e)
|
||||
//{
|
||||
// if ( g_eeGeneral.speakerMode == 0 )
|
||||
// {
|
||||
// buzzer_sound( 4 ) ;
|
||||
// }
|
||||
// else if ( g_eeGeneral.speakerMode == 1 )
|
||||
// {
|
||||
//// tone_start( 50 ) ;
|
||||
// playTone( 2000, 60 ) ; // 2KHz, 60mS
|
||||
// }
|
||||
//// audio.event(e,BEEP_DEFAULT_FREQ);
|
||||
//}
|
||||
|
||||
void hapticOff()
|
||||
{
|
||||
playTone( 2000, 60 ) ; // 2KHz, 60mS
|
||||
// audio.event(e,BEEP_DEFAULT_FREQ);
|
||||
PWM->PWM_DIS = PWM_DIS_CHID2 ; // Disable channel 2
|
||||
PWM->PWM_OOV &= ~0x00040000 ; // Force low
|
||||
PWM->PWM_OSS |= 0x00040000 ; // Force low
|
||||
}
|
||||
|
||||
// pwmPercent 0-100
|
||||
void hapticOn( uint32_t pwmPercent )
|
||||
{
|
||||
register Pwm *pwmptr ;
|
||||
|
||||
pwmptr = PWM ;
|
||||
|
||||
if ( pwmPercent > 100 )
|
||||
{
|
||||
pwmPercent = 100 ;
|
||||
}
|
||||
pwmptr->PWM_CH_NUM[2].PWM_CDTYUPD = pwmPercent ; // Duty
|
||||
pwmptr->PWM_ENA = PWM_ENA_CHID2 ; // Enable channel 2
|
||||
pwmptr->PWM_OSC = 0x00040000 ; // Enable output
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -48,12 +48,15 @@ extern void init_dac( void ) ;
|
|||
extern "C" void DAC_IRQHandler( void ) ;
|
||||
extern void end_sound( void ) ;
|
||||
extern void playTone( uint32_t frequency, uint32_t time ) ;
|
||||
extern uint32_t queueTone( uint32_t frequency, uint32_t time, uint32_t frequency_increment ) ;
|
||||
extern void tone_start( register uint32_t time ) ;
|
||||
extern void tone_stop( void ) ;
|
||||
extern void init_twi( void ) ;
|
||||
extern void set_volume( register uint8_t volume ) ;
|
||||
extern "C" void TWI0_IRQHandler (void) ;
|
||||
extern void audioDefevent( uint8_t e ) ;
|
||||
extern void hapticOff(void) ;
|
||||
extern void hapticOn( uint32_t pwmPercent ) ;
|
||||
extern void sound_5ms( void ) ;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -2025,11 +2025,16 @@ void perMain()
|
|||
static uint8_t s_batCheck;
|
||||
s_batCheck+=32;
|
||||
if (s_batCheck==0 && g_vbat100mV<g_eeGeneral.vBatWarn && g_vbat100mV>50) {
|
||||
AUDIO_ERROR();
|
||||
AUDIO_ERROR(); // TODO AUDIO_TX_BATTERY_LOW()
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
#if defined(PCBARM)
|
||||
AUDIO_HEARTBEAT(); // the queue processing
|
||||
#endif
|
||||
|
||||
}
|
||||
int16_t g_ppmIns[8];
|
||||
uint8_t ppmInState = 0; //0=unsync 1..8= wait for value i-1
|
||||
|
|
@ -2603,7 +2608,7 @@ int main(void)
|
|||
t0 = getTmr16KHz() - t0;
|
||||
#endif
|
||||
|
||||
g_timeMain = max(g_timeMain, t0);
|
||||
if (t0 > g_timeMain) g_timeMain = t0 ;
|
||||
}
|
||||
|
||||
#if defined(PCBARM) || defined(PCBV4)
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue