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X9D+ 2019 Bootloader: wait needed before detecting trims are pressed

as done on Horus...
This commit is contained in:
Bertrand Songis 2019-12-02 08:26:17 +01:00
parent adbe72d76f
commit a27417c497
No known key found for this signature in database
GPG key ID: F189F79290FEC50F
3 changed files with 7 additions and 4 deletions

View file

@ -69,13 +69,13 @@ FlashCheckRes valid;
MemoryType memoryType; MemoryType memoryType;
uint32_t unlocked = 0; uint32_t unlocked = 0;
void interrupt10ms(void) void interrupt10ms()
{ {
tenms |= 1; // 10 mS has passed tenms |= 1u; // 10 mS has passed
uint8_t index = 0; uint8_t index = 0;
uint8_t in = readKeys(); uint8_t in = readKeys();
for (uint8_t i = 1; i != uint8_t(1 << TRM_BASE); i <<= 1) { for (uint8_t i = 1; i != uint8_t(1u << TRM_BASE); i <<= 1) {
uint8_t value = (in & i); uint8_t value = (in & i);
keys[index].input(value); keys[index].input(value);
++index; ++index;
@ -210,7 +210,7 @@ int main()
pwrInit(); pwrInit();
keysInit(); keysInit();
#if defined(PCBHORUS) #if defined(BOOTLOADER_WAIT_BEFORE_READ_TRIMS)
// wait a bit for the inputs to stabilize... // wait a bit for the inputs to stabilize...
if (!WAS_RESET_BY_WATCHDOG_OR_SOFTWARE()) { if (!WAS_RESET_BY_WATCHDOG_OR_SOFTWARE()) {
for (uint32_t i = 0; i < 150000; i++) { for (uint32_t i = 0; i < 150000; i++) {

View file

@ -140,6 +140,8 @@
#define SWITCHES_GPIO_PIN_J GPIO_Pin_0 // PB.00 #define SWITCHES_GPIO_PIN_J GPIO_Pin_0 // PB.00
#endif #endif
#define BOOTLOADER_WAIT_BEFORE_READ_TRIMS
// Trims // Trims
#if defined(PCBX12S) #if defined(PCBX12S)
#define TRIMS_GPIO_REG_RHL GPIOC->IDR #define TRIMS_GPIO_REG_RHL GPIOC->IDR

View file

@ -228,6 +228,7 @@
#define TRIMS_GPIO_REG_RHL GPIOD->IDR #define TRIMS_GPIO_REG_RHL GPIOD->IDR
#define TRIMS_GPIO_PIN_RHL GPIO_Pin_9 // PD.09 #define TRIMS_GPIO_PIN_RHL GPIO_Pin_9 // PD.09
#elif defined(PCBX9DP) && PCBREV >= 2019 #elif defined(PCBX9DP) && PCBREV >= 2019
#define BOOTLOADER_WAIT_BEFORE_READ_TRIMS
#define TRIMS_GPIO_REG_LHL GPIOE->IDR #define TRIMS_GPIO_REG_LHL GPIOE->IDR
#define TRIMS_GPIO_PIN_LHL GPIO_Pin_3 // PE.03 #define TRIMS_GPIO_PIN_LHL GPIO_Pin_3 // PE.03
#define TRIMS_GPIO_REG_LHR GPIOE->IDR #define TRIMS_GPIO_REG_LHR GPIOE->IDR