mirror of
https://github.com/opentx/opentx.git
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SD card support on ersky9x board
Little animation at Tx start Backlight support for simu Mixes slow down / up now go 2 times faster
This commit is contained in:
bsongis
commit
c715aa2557
18 changed files with 1006 additions and 276 deletions
20
src/Makefile
20
src/Makefile
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@ -321,14 +321,14 @@ ifeq ($(PCB), ARM)
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# V4 ARM, so ...
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OPT = 2
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CPPDEFS += -DPCBARM -DAUDIO -DHAPTIC -DPXX -DDSM2 -DDSM2_PPM
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EXTRAINCDIRS += ersky9x FreeRTOSV7.1.1/Source/include FreeRTOSV7.1.1/Source/portable/IAR/ARM_CM3
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EXTRAINCDIRS += ersky9x
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BOARDSRC = board_ersky9x.cpp
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EXTRABOARDSRC = ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c
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CPPSRC += ersky9x/ff.cpp ersky9x/diskio.cpp ersky9x/gtime.cpp
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SRC = ersky9x/core_cm3.c ersky9x/board_lowlevel.c ersky9x/crt.c ersky9x/vectors_sam3s.c
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CPPSRC += ersky9x/ff.cpp ersky9x/diskio.cpp ersky9x/gtime.cpp ersky9x/sdcard_driver.cpp
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EEPROMSRC = eeprom_arm.cpp
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PULSESSRC = pulses_arm.cpp
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CPPSRC += ersky9x/audio.cpp haptic.cpp
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CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp ersky9x/sdcard_driver.cpp
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CPPSRC += ersky9x/sound_driver.cpp ersky9x/haptic_driver.cpp
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endif
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ifeq ($(PCB), V4)
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@ -673,16 +673,14 @@ remallsrc:
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# Link: create ELF output file from object files.
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ifeq ($(PCB), ARM)
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%.elf: allsrc.cpp
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%.o: %.c
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$(CC) $(ALL_CPPFLAGS) $< -o $@
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OBJS = $(SRC:.c=.o)
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%.elf: allsrc.cpp $(OBJS)
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@echo
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@echo $(MSG_COMPILING) $@
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#$(CC) $(ALL_CPPFLAGS) FreeRTOSV7.1.1/Source/list.c -o list.o
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#$(CC) $(ALL_CPPFLAGS) FreeRTOSV7.1.1/Source/queue.c -o queue.o
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#$(CC) $(ALL_CPPFLAGS) FreeRTOSV7.1.1/Source/tasks.c -o tasks.o
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#$(CC) $(ALL_CPPFLAGS) FreeRTOSV7.1.1/Source/timers.c -o timers.o
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#$(CC) $(ALL_CPPFLAGS) FreeRTOSV7.1.1/Source/portable/GCC/ARM_CM3_MPU/port.c -o port.o
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$(CC) $(ALL_CPPFLAGS) $< -o allsrc.o
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$(CC) allsrc.o -mcpu=cortex-m3 -mthumb -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref,--no-warn-mismatch -o $@
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$(CC) allsrc.o $(OBJS) -mcpu=cortex-m3 -mthumb -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(TARGET).map,--cref,--no-warn-mismatch -o $@
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else
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%.elf: allsrc.cpp
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@echo
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@ -32,6 +32,7 @@
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*/
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#include "open9x.h"
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#include "board.h"
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uint32_t Master_frequency ;
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volatile uint32_t Tenms ;
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@ -723,13 +724,14 @@ void board_init()
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start_timer0() ;
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init_adc() ;
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init_pwm() ;
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init_SDcard() ;
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__enable_irq() ;
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start_sound() ;
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eeprom_init();
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init_SDcard();
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}
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#endif
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@ -42,7 +42,9 @@
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#include "ersky9x/sound_driver.h"
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#include "ersky9x/haptic_driver.h"
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#include "ersky9x/sdcard_driver.h"
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extern void init_SDcard();
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extern void sd_poll_10mS();
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#define PIN_ENABLE 0x001
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#define PIN_PERIPHERAL 0x000
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@ -918,46 +918,121 @@ typedef struct {
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#define HSMCI_CR_PWSDIS (0x1 << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */
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#define HSMCI_CR_SWRST (0x1 << 7) /**< \brief (HSMCI_CR) Software Reset */
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/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */
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#define HSMCI_MR_CLKDIV (0xff << 0) /**< \brief (HSMCI_MR) Clock Divider */
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#define HSMCI_MR_PWSDIV (0x7 << 8) /**< \brief (HSMCI_MR) Power Saving Divider */
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#define HSMCI_MR_RDPROOF (0x1 << 11) /**< \brief (HSMCI_MR) */
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#define HSMCI_MR_WRPROOF (0x1 << 12) /**< \brief (HSMCI_MR) */
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#define HSMCI_MR_FBYTE (0x1 << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */
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#define HSMCI_MR_PADV (0x1 << 14) /**< \brief (HSMCI_MR) Padding Value */
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#define HSMCI_MR_PDCMODE (0x1 << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */
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#define HSMCI_MR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_MR) Data Block Length */
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#define HSMCI_MR_CLKDIV_Pos 0
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#define HSMCI_MR_CLKDIV_Msk (0xffu << HSMCI_MR_CLKDIV_Pos) /**< \brief (HSMCI_MR) Clock Divider */
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#define HSMCI_MR_CLKDIV(value) ((HSMCI_MR_CLKDIV_Msk & ((value) << HSMCI_MR_CLKDIV_Pos)))
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#define HSMCI_MR_PWSDIV_Pos 8
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#define HSMCI_MR_PWSDIV_Msk (0x7u << HSMCI_MR_PWSDIV_Pos) /**< \brief (HSMCI_MR) Power Saving Divider */
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#define HSMCI_MR_PWSDIV(value) ((HSMCI_MR_PWSDIV_Msk & ((value) << HSMCI_MR_PWSDIV_Pos)))
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#define HSMCI_MR_RDPROOF (0x1u << 11) /**< \brief (HSMCI_MR) */
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#define HSMCI_MR_WRPROOF (0x1u << 12) /**< \brief (HSMCI_MR) */
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#define HSMCI_MR_FBYTE (0x1u << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */
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#define HSMCI_MR_PADV (0x1u << 14) /**< \brief (HSMCI_MR) Padding Value */
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#define HSMCI_MR_PDCMODE (0x1u << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */
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#define HSMCI_MR_BLKLEN_Pos 16
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#define HSMCI_MR_BLKLEN_Msk (0xffffu << HSMCI_MR_BLKLEN_Pos) /**< \brief (HSMCI_MR) Data Block Length */
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#define HSMCI_MR_BLKLEN(value) ((HSMCI_MR_BLKLEN_Msk & ((value) << HSMCI_MR_BLKLEN_Pos)))
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/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */
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#define HSMCI_DTOR_DTOCYC (0xf << 0) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */
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#define HSMCI_DTOR_DTOMUL (0x7 << 4) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */
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#define HSMCI_DTOR_DTOCYC_Pos 0
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#define HSMCI_DTOR_DTOCYC_Msk (0xfu << HSMCI_DTOR_DTOCYC_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */
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#define HSMCI_DTOR_DTOCYC(value) ((HSMCI_DTOR_DTOCYC_Msk & ((value) << HSMCI_DTOR_DTOCYC_Pos)))
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#define HSMCI_DTOR_DTOMUL_Pos 4
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#define HSMCI_DTOR_DTOMUL_Msk (0x7u << HSMCI_DTOR_DTOMUL_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */
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#define HSMCI_DTOR_DTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_DTOR) DTOCYC */
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#define HSMCI_DTOR_DTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 16 */
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#define HSMCI_DTOR_DTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 128 */
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#define HSMCI_DTOR_DTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 256 */
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#define HSMCI_DTOR_DTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1024 */
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#define HSMCI_DTOR_DTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 4096 */
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#define HSMCI_DTOR_DTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 65536 */
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#define HSMCI_DTOR_DTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1048576 */
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/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */
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#define HSMCI_SDCR_SDCSEL (0x3 << 0) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */
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#define HSMCI_SDCR_SDCBUS (0x3 << 6) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */
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#define HSMCI_SDCR_SDCSEL_Pos 0
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#define HSMCI_SDCR_SDCSEL_Msk (0x3u << HSMCI_SDCR_SDCSEL_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */
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#define HSMCI_SDCR_SDCSEL_SLOTA (0x0u << 0) /**< \brief (HSMCI_SDCR) Slot A is selected. */
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#define HSMCI_SDCR_SDCSEL_SLOTB (0x1u << 0) /**< \brief (HSMCI_SDCR) - */
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#define HSMCI_SDCR_SDCSEL_SLOTC (0x2u << 0) /**< \brief (HSMCI_SDCR) - */
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#define HSMCI_SDCR_SDCSEL_SLOTD (0x3u << 0) /**< \brief (HSMCI_SDCR) - */
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#define HSMCI_SDCR_SDCBUS_Pos 6
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#define HSMCI_SDCR_SDCBUS_Msk (0x3u << HSMCI_SDCR_SDCBUS_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */
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#define HSMCI_SDCR_SDCBUS_1 (0x0u << 6) /**< \brief (HSMCI_SDCR) 1 bit */
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#define HSMCI_SDCR_SDCBUS_4 (0x2u << 6) /**< \brief (HSMCI_SDCR) 4 bit */
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#define HSMCI_SDCR_SDCBUS_8 (0x3u << 6) /**< \brief (HSMCI_SDCR) 8 bit */
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/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */
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#define HSMCI_ARGR_ARG (0xffffffff << 0) /**< \brief (HSMCI_ARGR) Command Argument */
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/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */
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#define HSMCI_CMDR_CMDNB (0x3f << 0) /**< \brief (HSMCI_CMDR) Command Number */
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#define HSMCI_CMDR_RSPTYP (0x3 << 6) /**< \brief (HSMCI_CMDR) Response Type */
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#define HSMCI_CMDR_SPCMD (0x7 << 8) /**< \brief (HSMCI_CMDR) Special Command */
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#define HSMCI_CMDR_OPDCMD (0x1 << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */
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#define HSMCI_CMDR_MAXLAT (0x1 << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */
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#define HSMCI_CMDR_TRCMD (0x3 << 16) /**< \brief (HSMCI_CMDR) Transfer Command */
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#define HSMCI_CMDR_TRDIR (0x1 << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */
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#define HSMCI_CMDR_TRTYP (0x7 << 19) /**< \brief (HSMCI_CMDR) Transfer Type */
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#define HSMCI_CMDR_IOSPCMD (0x3 << 24) /**< \brief (HSMCI_CMDR) SDIO Special Command */
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#define HSMCI_CMDR_ATACS (0x1 << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */
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#define HSMCI_CMDR_BOOT_ACK (0x1 << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */
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#define HSMCI_CMDR_CMDNB_Pos 0
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#define HSMCI_CMDR_CMDNB_Msk (0x3fu << HSMCI_CMDR_CMDNB_Pos) /**< \brief (HSMCI_CMDR) Command Number */
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#define HSMCI_CMDR_CMDNB(value) ((HSMCI_CMDR_CMDNB_Msk & ((value) << HSMCI_CMDR_CMDNB_Pos)))
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#define HSMCI_CMDR_RSPTYP_Pos 6
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#define HSMCI_CMDR_RSPTYP_Msk (0x3u << HSMCI_CMDR_RSPTYP_Pos) /**< \brief (HSMCI_CMDR) Response Type */
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#define HSMCI_CMDR_RSPTYP_NORESP (0x0u << 6) /**< \brief (HSMCI_CMDR) No response. */
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#define HSMCI_CMDR_RSPTYP_48_BIT (0x1u << 6) /**< \brief (HSMCI_CMDR) 48-bit response. */
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#define HSMCI_CMDR_RSPTYP_136_BIT (0x2u << 6) /**< \brief (HSMCI_CMDR) 136-bit response. */
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#define HSMCI_CMDR_RSPTYP_R1B (0x3u << 6) /**< \brief (HSMCI_CMDR) R1b response type */
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#define HSMCI_CMDR_SPCMD_Pos 8
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#define HSMCI_CMDR_SPCMD_Msk (0x7u << HSMCI_CMDR_SPCMD_Pos) /**< \brief (HSMCI_CMDR) Special Command */
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#define HSMCI_CMDR_SPCMD_STD (0x0u << 8) /**< \brief (HSMCI_CMDR) Not a special CMD. */
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#define HSMCI_CMDR_SPCMD_INIT (0x1u << 8) /**< \brief (HSMCI_CMDR) Initialization CMD:74 clock cycles for initialization sequence. */
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#define HSMCI_CMDR_SPCMD_SYNC (0x2u << 8) /**< \brief (HSMCI_CMDR) Synchronized CMD:Wait for the end of the current data block transfer before sending the pending command. */
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#define HSMCI_CMDR_SPCMD_CE_ATA (0x3u << 8) /**< \brief (HSMCI_CMDR) CE-ATA Completion Signal disable Command.The host cancels the ability for the device to return a command completion signal on the command line. */
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#define HSMCI_CMDR_SPCMD_IT_CMD (0x4u << 8) /**< \brief (HSMCI_CMDR) Interrupt command:Corresponds to the Interrupt Mode (CMD40). */
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#define HSMCI_CMDR_SPCMD_IT_RESP (0x5u << 8) /**< \brief (HSMCI_CMDR) Interrupt response:Corresponds to the Interrupt Mode (CMD40). */
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#define HSMCI_CMDR_SPCMD_BOR (0x6u << 8) /**< \brief (HSMCI_CMDR) Boot Operation Request.Start a boot operation mode, the host processor can read boot data from the MMC device directly. */
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#define HSMCI_CMDR_SPCMD_EBO (0x7u << 8) /**< \brief (HSMCI_CMDR) End Boot Operation.This command allows the host processor to terminate the boot operation mode. */
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#define HSMCI_CMDR_OPDCMD (0x1u << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */
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#define HSMCI_CMDR_OPDCMD_PUSHPULL (0x0u << 11) /**< \brief (HSMCI_CMDR) Push pull command. */
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#define HSMCI_CMDR_OPDCMD_OPENDRAIN (0x1u << 11) /**< \brief (HSMCI_CMDR) Open drain command. */
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#define HSMCI_CMDR_MAXLAT (0x1u << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */
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#define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */
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#define HSMCI_CMDR_MAXLAT_64 (0x1u << 12) /**< \brief (HSMCI_CMDR) 64-cycle max latency. */
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#define HSMCI_CMDR_TRCMD_Pos 16
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#define HSMCI_CMDR_TRCMD_Msk (0x3u << HSMCI_CMDR_TRCMD_Pos) /**< \brief (HSMCI_CMDR) Transfer Command */
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#define HSMCI_CMDR_TRCMD_NO_DATA (0x0u << 16) /**< \brief (HSMCI_CMDR) No data transfer */
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#define HSMCI_CMDR_TRCMD_START_DATA (0x1u << 16) /**< \brief (HSMCI_CMDR) Start data transfer */
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#define HSMCI_CMDR_TRCMD_STOP_DATA (0x2u << 16) /**< \brief (HSMCI_CMDR) Stop data transfer */
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#define HSMCI_CMDR_TRDIR (0x1u << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */
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#define HSMCI_CMDR_TRDIR_WRITE (0x0u << 18) /**< \brief (HSMCI_CMDR) Write. */
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#define HSMCI_CMDR_TRDIR_READ (0x1u << 18) /**< \brief (HSMCI_CMDR) Read. */
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#define HSMCI_CMDR_TRTYP_Pos 19
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#define HSMCI_CMDR_TRTYP_Msk (0x7u << HSMCI_CMDR_TRTYP_Pos) /**< \brief (HSMCI_CMDR) Transfer Type */
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#define HSMCI_CMDR_TRTYP_SINGLE (0x0u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Single Block */
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#define HSMCI_CMDR_TRTYP_MULTIPLE (0x1u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Multiple Block */
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#define HSMCI_CMDR_TRTYP_STREAM (0x2u << 19) /**< \brief (HSMCI_CMDR) MMC Stream */
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#define HSMCI_CMDR_TRTYP_BYTE (0x4u << 19) /**< \brief (HSMCI_CMDR) SDIO Byte */
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#define HSMCI_CMDR_TRTYP_BLOCK (0x5u << 19) /**< \brief (HSMCI_CMDR) SDIO Block */
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#define HSMCI_CMDR_IOSPCMD_Pos 24
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#define HSMCI_CMDR_IOSPCMD_Msk (0x3u << HSMCI_CMDR_IOSPCMD_Pos) /**< \brief (HSMCI_CMDR) SDIO Special Command */
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#define HSMCI_CMDR_IOSPCMD_STD (0x0u << 24) /**< \brief (HSMCI_CMDR) Not an SDIO Special Command */
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#define HSMCI_CMDR_IOSPCMD_SUSPEND (0x1u << 24) /**< \brief (HSMCI_CMDR) SDIO Suspend Command */
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#define HSMCI_CMDR_IOSPCMD_RESUME (0x2u << 24) /**< \brief (HSMCI_CMDR) SDIO Resume Command */
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#define HSMCI_CMDR_ATACS (0x1u << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */
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#define HSMCI_CMDR_ATACS_NORMAL (0x0u << 26) /**< \brief (HSMCI_CMDR) Normal operation mode. */
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#define HSMCI_CMDR_ATACS_COMPLETION (0x1u << 26) /**< \brief (HSMCI_CMDR) This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). */
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#define HSMCI_CMDR_BOOT_ACK (0x1u << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */
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/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */
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#define HSMCI_BLKR_BCNT (0xffff << 0) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */
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#define HSMCI_BLKR_BLKLEN (0xffff << 16) /**< \brief (HSMCI_BLKR) Data Block Length */
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#define HSMCI_BLKR_BCNT_Pos 0
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#define HSMCI_BLKR_BCNT_Msk (0xffffu << HSMCI_BLKR_BCNT_Pos) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */
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#define HSMCI_BLKR_BCNT_MULTIPLE (0x0u << 0) /**< \brief (HSMCI_BLKR) MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an infinite block transfer. */
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#define HSMCI_BLKR_BCNT_BYTE (0x4u << 0) /**< \brief (HSMCI_BLKR) SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte transfer.Values from 0x200 to 0xFFFF are forbidden. */
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#define HSMCI_BLKR_BCNT_BLOCK (0x5u << 0) /**< \brief (HSMCI_BLKR) SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block transfer.Values from 0x200 to 0xFFFF are forbidden. */
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#define HSMCI_BLKR_BLKLEN_Pos 16
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#define HSMCI_BLKR_BLKLEN_Msk (0xffffu << HSMCI_BLKR_BLKLEN_Pos) /**< \brief (HSMCI_BLKR) Data Block Length */
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#define HSMCI_BLKR_BLKLEN(value) ((HSMCI_BLKR_BLKLEN_Msk & ((value) << HSMCI_BLKR_BLKLEN_Pos)))
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/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */
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#define HSMCI_CSTOR_CSTOCYC (0xf << 0) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */
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#define HSMCI_CSTOR_CSTOMUL (0x7 << 4) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */
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#define HSMCI_CSTOR_CSTOCYC_Pos 0
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#define HSMCI_CSTOR_CSTOCYC_Msk (0xfu << HSMCI_CSTOR_CSTOCYC_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */
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#define HSMCI_CSTOR_CSTOCYC(value) ((HSMCI_CSTOR_CSTOCYC_Msk & ((value) << HSMCI_CSTOR_CSTOCYC_Pos)))
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#define HSMCI_CSTOR_CSTOMUL_Pos 4
|
||||
#define HSMCI_CSTOR_CSTOMUL_Msk (0x7u << HSMCI_CSTOR_CSTOMUL_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */
|
||||
#define HSMCI_CSTOR_CSTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 16 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 128 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 256 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1024 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 4096 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 65536 */
|
||||
#define HSMCI_CSTOR_CSTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1048576 */
|
||||
/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */
|
||||
#define HSMCI_RSPR_RSP (0xffffffff << 0) /**< \brief (HSMCI_RSPR[4]) Response */
|
||||
/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */
|
||||
|
|
|
|||
697
src/ersky9x/board.h
Normal file
697
src/ersky9x/board.h
Normal file
|
|
@ -0,0 +1,697 @@
|
|||
/*
|
||||
* Authors (alphabetical order)
|
||||
* - Bertrand Songis <bsongis@gmail.com>
|
||||
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
|
||||
* - Cameron Weeks <th9xer@gmail.com>
|
||||
* - Erez Raviv
|
||||
* - Jean-Pierre Parisy
|
||||
* - Karl Szmutny <shadow@privy.de>
|
||||
* - Michael Blandford
|
||||
* - Michal Hlavinka
|
||||
* - Pat Mackenzie
|
||||
* - Philip Moss
|
||||
* - Rob Thomson
|
||||
* - Romolo Manfredini <romolo.manfredini@gmail.com>
|
||||
* - Thomas Husterer
|
||||
*
|
||||
* open9x is based on code named
|
||||
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
|
||||
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
|
||||
* and the original (and ongoing) project by
|
||||
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef board_h
|
||||
#define board_h
|
||||
|
||||
#define TRACE_ERROR(...)
|
||||
#define TRACE_WARNING(...)
|
||||
#define TRACE_WARNING_WP(...)
|
||||
#define TRACE_DEBUG(...)
|
||||
#define TRACE_INFO(...)
|
||||
#define TRACE_INFO_WP(...)
|
||||
|
||||
#define assert(x)
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#ifdef REVA
|
||||
#include "AT91SAM3S2.h"
|
||||
#else
|
||||
#include "AT91SAM3S4.h"
|
||||
#endif
|
||||
|
||||
//#include "SAM3S.h"
|
||||
#define BOARD_MCK 64000000
|
||||
|
||||
/// SD card block size in bytes.
|
||||
#define SD_BLOCK_SIZE 512
|
||||
|
||||
/// There was an error with the SD driver.
|
||||
#define SD_ERROR_DRIVER 1
|
||||
/// The SD card did not answer the command.
|
||||
#define SD_ERROR_NORESPONSE 2
|
||||
/// The SD card did not answer the command.
|
||||
#define SD_ERROR_NOT_INITIALIZED 3
|
||||
/// The SD card is busy
|
||||
#define SD_ERROR_BUSY 4
|
||||
/// The operation is not supported
|
||||
#define SD_ERROR_NOT_SUPPORT 5
|
||||
|
||||
typedef void (*SdCallback)(unsigned char status, void *pCommand);
|
||||
|
||||
typedef struct _SdCmd {
|
||||
|
||||
/// Command status.
|
||||
volatile char status;
|
||||
/// Command code.
|
||||
unsigned int cmd;
|
||||
/// Command argument.
|
||||
unsigned int arg;
|
||||
/// Data buffer.
|
||||
unsigned char *pData;
|
||||
/// Size of data buffer in bytes.
|
||||
unsigned short blockSize;
|
||||
/// Number of blocks to be transfered
|
||||
unsigned short nbBlock;
|
||||
/// Indicate if continue to transfer data
|
||||
unsigned char conTrans;
|
||||
/// Indicates if the command is a read operation.
|
||||
unsigned char isRead;
|
||||
/// Response buffer.
|
||||
unsigned int *pResp;
|
||||
/// SD card response type.
|
||||
unsigned char resType;
|
||||
/// Optional user-provided callback function.
|
||||
SdCallback callback;
|
||||
/// Optional argument to the callback function.
|
||||
void *pArg;
|
||||
|
||||
} SdCmd;
|
||||
|
||||
typedef struct {
|
||||
|
||||
/// Pointer to a SPI peripheral.
|
||||
//AT91S_MCI *pSdHw;
|
||||
/// SPI peripheral identifier.
|
||||
unsigned char spiId;
|
||||
/// Pointer to currently executing command.
|
||||
SdCmd *pCommand;
|
||||
/// Mutex.
|
||||
volatile char semaphore;
|
||||
|
||||
} SdDriver;
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// Definitions
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par
|
||||
/// This page lists several definition related to the board description.
|
||||
///
|
||||
/// Definitions
|
||||
/// - BOARD_NAME
|
||||
|
||||
/// Name of the board.
|
||||
#define BOARD_NAME "AT91SAM3S-EK"
|
||||
/// Board definition.
|
||||
#define at91sam3sek
|
||||
/// Family definition (already defined).
|
||||
#define at91sam3s
|
||||
/// Core definition
|
||||
#define cortexm3
|
||||
|
||||
//#define BOARD_REV_A
|
||||
#define BOARD_REV_B
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_opfreq "SAM3S-EK - Operating frequencies"
|
||||
/// This page lists several definition related to the board operating frequency
|
||||
/// (when using the initialization done by board_lowlevel.c).
|
||||
///
|
||||
/// !Definitions
|
||||
/// - BOARD_MAINOSC
|
||||
/// - BOARD_MCK
|
||||
|
||||
/// Frequency of the board main oscillator.
|
||||
#define BOARD_MAINOSC 12000000
|
||||
|
||||
/// Master clock frequency (when using board_lowlevel.c).
|
||||
//#define BOARD_MCK 48000000
|
||||
#define BOARD_MCK 64000000
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
// ADC
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
/// Startup time max, return from Idle mode (in µs)
|
||||
#define ADC_STARTUP_TIME_MAX 15
|
||||
/// Track and hold Acquisition Time min (in ns)
|
||||
#define ADC_TRACK_HOLD_TIME_MIN 1200
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// USB attributes configuration descriptor (bus or self powered, remote wakeup)
|
||||
//#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_RWAKEUP
|
||||
#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_SELFPOWERED_NORWAKEUP
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_piodef "SAM3S-EK - PIO definitions"
|
||||
/// This pages lists all the pio definitions contained in board.h. The constants
|
||||
/// are named using the following convention: PIN_* for a constant which defines
|
||||
/// a single Pin instance (but may include several PIOs sharing the same
|
||||
/// controller), and PINS_* for a list of Pin instances.
|
||||
///
|
||||
/// !ADC
|
||||
/// - PIN_ADC0_AD0
|
||||
/// - PIN_ADC0_AD1
|
||||
/// - PIN_ADC0_AD2
|
||||
/// - PIN_ADC0_AD3
|
||||
/// - PIN_ADC0_AD4
|
||||
/// - PIN_ADC0_AD5
|
||||
/// - PIN_ADC0_AD6
|
||||
/// - PIN_ADC0_AD7
|
||||
/// - PINS_ADC0
|
||||
///
|
||||
/// !UART
|
||||
/// - PINS_UART
|
||||
///
|
||||
/// !EBI
|
||||
/// - PIN_EBI_DATA_BUS
|
||||
/// - PIN_EBI_NCS0
|
||||
/// - PIN_EBI_NRD
|
||||
/// - PIN_EBI_NWE
|
||||
/// - PIN_EBI_ADDR_BUS
|
||||
/// - PIN_EBI_PSRAM_NBS
|
||||
/// - PIN_EBI_A1
|
||||
/// - PIN_EBI_LCD_RS
|
||||
///
|
||||
/// !LEDs
|
||||
/// - PIN_LED_0
|
||||
/// - PIN_LED_1
|
||||
/// - PIN_LED_2
|
||||
/// - PINS_LEDS
|
||||
///
|
||||
/// !MCI
|
||||
/// - PINS_MCI
|
||||
///
|
||||
/// !Push buttons
|
||||
/// - PIN_PUSHBUTTON_1
|
||||
/// - PIN_PUSHBUTTON_2
|
||||
/// - PINS_PUSHBUTTONS
|
||||
/// - PUSHBUTTON_BP1
|
||||
/// - PUSHBUTTON_BP2
|
||||
///
|
||||
/// !PWMC
|
||||
/// - PIN_PWMC_PWMH0
|
||||
/// - PIN_PWMC_PWML0
|
||||
/// - PIN_PWMC_PWMH1
|
||||
/// - PIN_PWMC_PWML1
|
||||
/// - PIN_PWMC_PWMH2
|
||||
/// - PIN_PWMC_PWML2
|
||||
/// - PIN_PWMC_PWMH3
|
||||
/// - PIN_PWMC_PWML3
|
||||
/// - PIN_PWM_LED0
|
||||
/// - PIN_PWM_LED1
|
||||
/// - PIN_PWM_LED2
|
||||
/// - CHANNEL_PWM_LED0
|
||||
/// - CHANNEL_PWM_LED1
|
||||
/// - CHANNEL_PWM_LED2
|
||||
///
|
||||
/// !SPI
|
||||
/// - PIN_SPI_MISO
|
||||
/// - PIN_SPI_MOSI
|
||||
/// - PIN_SPI_SPCK
|
||||
/// - PINS_SPI
|
||||
/// - PIN_SPI_NPCS0_PA11
|
||||
///
|
||||
/// ! SSC
|
||||
/// - PIN_SSC_TD
|
||||
/// - PIN_SSC_TK
|
||||
/// - PIN_SSC_TF
|
||||
/// - PINS_SSC_CODEC
|
||||
///
|
||||
/// ! PCK0
|
||||
/// - PIN_PCK0
|
||||
///
|
||||
/// !TWI
|
||||
/// - PIN_TWI_TWD0
|
||||
/// - PIN_TWI_TWCK0
|
||||
/// - PINS_TWI
|
||||
///
|
||||
/// !USART0
|
||||
/// - PIN_USART0_RXD
|
||||
/// - PIN_USART0_TXD
|
||||
/// - PIN_USART0_CTS
|
||||
/// - PIN_USART0_RTS
|
||||
/// - PIN_USART0_SCK
|
||||
///
|
||||
/// !USB
|
||||
/// - PIN_USB_PULLUP
|
||||
///
|
||||
|
||||
/// ADC_AD0 pin definition.
|
||||
#define PIN_ADC0_AD0 {1 << 21, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD1 pin definition.
|
||||
#define PIN_ADC0_AD1 {1 << 30, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD2 pin definition.
|
||||
#define PIN_ADC0_AD2 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD3 pin definition.
|
||||
#define PIN_ADC0_AD3 {1 << 4, PIOB, ID_PIOB, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD4 pin definition.
|
||||
#define PIN_ADC0_AD4 {1 << 15, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD5 pin definition.
|
||||
#define PIN_ADC0_AD5 {1 << 16, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD6 pin definition.
|
||||
#define PIN_ADC0_AD6 {1 << 17, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
/// ADC_AD7 pin definition.
|
||||
#define PIN_ADC0_AD7 {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
|
||||
/// Pins ADC
|
||||
#define PINS_ADC PIN_ADC0_AD0, PIN_ADC0_AD1, PIN_ADC0_AD2, PIN_ADC0_AD3, PIN_ADC0_AD4, PIN_ADC0_AD5, PIN_ADC0_AD6, PIN_ADC0_AD7
|
||||
|
||||
/** UART pins (UTXD0 and URXD0) definitions, PA9,10. */
|
||||
#define PINS_UART {0x00000600, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// EBI
|
||||
#define PIN_EBI_DATA_BUS {0xFF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NRD {1 << 11, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NWE {1 << 8, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
#define PIN_EBI_NCS0 {1 << 20, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_ADDR_BUS {0x3f00fff, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_PSRAM_NBS {1 << 7, PIOB, ID_PIOB, PIO_PERIPH_B, PIO_PULLUP}, \
|
||||
{1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_A1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
#define PIN_EBI_NCS1 {1 << 15, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD CS pin */
|
||||
#define PIN_EBI_LCD_RS {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP} /* LCD RS pin */
|
||||
|
||||
#ifdef BOARD_REV_A
|
||||
/** LED #0 pin definition. */
|
||||
#define PIN_LED_0 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #1 pin definition. */
|
||||
#define PIN_LED_1 {1 << 21, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #2 pin definition. */
|
||||
#define PIN_LED_2 {1 << 22, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
/** LED #0 pin definition. */
|
||||
#define PIN_LED_0 {1 << 19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #1 pin definition. */
|
||||
#define PIN_LED_1 {1 << 20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/** LED #2 pin definition. */
|
||||
#define PIN_LED_2 {1 << 20, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
#endif
|
||||
|
||||
/** List of all LEDs definitions. */
|
||||
#define PINS_LEDS PIN_LED_0, PIN_LED_1, PIN_LED_2
|
||||
|
||||
/** MCI pins definition. */
|
||||
#define PINS_MCI {0x3fUL << 26, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_PULLUP}
|
||||
/** MCI pin Card Detect. */
|
||||
#define PIN_MCI_CD {PIO_PB7, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/** Push button #0 definition. Attributes = pull-up + debounce + interrupt on rising edge. */
|
||||
#define PIN_PUSHBUTTON_1 {1 << 3, PIOB, ID_PIOB, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||
/** Push button #1 definition. Attributes = pull-up + debounce + interrupt on falling edge. */
|
||||
#define PIN_PUSHBUTTON_2 {1 << 12, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE}
|
||||
/** List of all push button definitions. */
|
||||
#define PINS_PUSHBUTTONS PIN_PUSHBUTTON_1, PIN_PUSHBUTTON_2
|
||||
|
||||
/** Push button #1 index. */
|
||||
#define PUSHBUTTON_BP1 0
|
||||
/** Push button #2 index. */
|
||||
#define PUSHBUTTON_BP2 1
|
||||
|
||||
/// Simulated joystick LEFT index.
|
||||
#define JOYSTICK_LEFT 0
|
||||
/// Simulated joystick RIGHT index.
|
||||
#define JOYSTICK_RIGHT 1
|
||||
|
||||
/** PWMC PWM0 pin definition. */
|
||||
#define PIN_PWMC_PWMH0 {1 << 18, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML0 {1 << 19, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM1 pin definition. */
|
||||
#define PIN_PWMC_PWMH1 {1 << 19, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML1 {1 << 20, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
/** PWMC PWM2 pin definition. */
|
||||
#define PIN_PWMC_PWMH2 {1 << 20, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML2 {1 << 16, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWMC PWM3 pin definition. */
|
||||
#define PIN_PWMC_PWMH3 {1 << 21, PIOC, ID_PIOC, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
#define PIN_PWMC_PWML3 {1 << 15, PIOA, ID_PIOA, PIO_PERIPH_C, PIO_DEFAULT}
|
||||
/** PWM pin definition for LED0 */
|
||||
#define PIN_PWM_LED0 PIN_PWMC_PWMH0, PIN_PWMC_PWML0
|
||||
/** PWM pin definition for LED1 */
|
||||
#define PIN_PWM_LED1 PIN_PWMC_PWMH2, PIN_PWMC_PWML2
|
||||
/** PWM pin definition for LED2 */
|
||||
#define PIN_PWM_LED2 PIN_PWMC_PWMH3, PIN_PWMC_PWML3
|
||||
/** PWM channel for LED0 */
|
||||
#define CHANNEL_PWM_LED0 0
|
||||
/** PWM channel for LED1 */
|
||||
#define CHANNEL_PWM_LED1 2
|
||||
/** PWM channel for LED2 */
|
||||
#define CHANNEL_PWM_LED2 3
|
||||
|
||||
/** SPI MISO pin definition. */
|
||||
#define PIN_SPI_MISO {1 << 12, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI MOSI pin definition. */
|
||||
#define PIN_SPI_MOSI {1 << 13, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI SPCK pin definition. */
|
||||
#define PIN_SPI_SPCK {1 << 14, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** SPI chip select pin definition. */
|
||||
#define PIN_SPI_NPCS0_PA11 {1 << 11, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
/** List of SPI pin definitions (MISO, MOSI & SPCK). */
|
||||
#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SPCK
|
||||
|
||||
/// SSC pins definition.
|
||||
#define PIN_SSC_TD {0x1 << 26, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TK {0x1 << 28, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_SSC_TF {0x1 << 30, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_SSC_CODEC PIN_SSC_TD, PIN_SSC_TK, PIN_SSC_TF
|
||||
|
||||
/// PCK0
|
||||
#define PIN_PCK0 {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
|
||||
|
||||
/// TWI pins definition.
|
||||
#define TWI_V3XX
|
||||
#define PIN_TWI_TWD0 {0x1 << 9, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK0 {0x1 << 10, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI0 PIN_TWI_TWD0, PIN_TWI_TWCK0
|
||||
#define PIN_TWI_TWD1 {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_TWI_TWCK1 {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PINS_TWI1 PIN_TWI_TWD1, PIN_TWI_TWCK1
|
||||
|
||||
/// USART0
|
||||
#define PIN_USART0_RXD {0x1 << 19, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_TXD {0x1 << 18, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_CTS {0x1 << 8, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_RTS {0x1 << 7, PIOB, ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART0_SCK {0x1 << 17, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
|
||||
/// USART1
|
||||
#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_TXD {0x1 << 22, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_CTS {0x1 << 25, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_RTS {0x1 << 24, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
|
||||
#define PIN_USART1_EN {0x1 << 23, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
|
||||
|
||||
|
||||
/// USB VBus monitoring pin definition.
|
||||
#ifdef BOARD_REV_A
|
||||
#define PIN_USB_VBUS {1 << 23, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
#define PIN_USB_VBUS {1 << 21, PIOC, ID_PIOC, PIO_INPUT, PIO_DEFAULT}
|
||||
#endif
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the AT91SAM3S-EK.
|
||||
///
|
||||
/// !AT45 Dataflash Card
|
||||
/// - BOARD_AT45_A_SPI_BASE
|
||||
/// - BOARD_AT45_A_SPI_ID
|
||||
/// - BOARD_AT45_A_SPI_PINS
|
||||
/// - BOARD_AT45_A_SPI
|
||||
/// - BOARD_AT45_A_NPCS
|
||||
/// - BOARD_AT45_A_NPCS_PIN
|
||||
///
|
||||
/// !AT45 Dataflash (serial onboard DataFlash)
|
||||
/// - BOARD_AT45_B_SPI_BASE
|
||||
/// - BOARD_AT45_B_SPI_ID
|
||||
/// - BOARD_AT45_B_SPI_PINS
|
||||
/// - BOARD_AT45_B_SPI
|
||||
/// - BOARD_AT45_B_NPCS
|
||||
/// - BOARD_AT45_B_NPCS_PIN
|
||||
///
|
||||
/// !AT26 Serial Flash
|
||||
/// - BOARD_AT26_A_SPI_BASE
|
||||
/// - BOARD_AT26_A_SPI_ID
|
||||
/// - BOARD_AT26_A_SPI_PINS
|
||||
/// - BOARD_AT26_A_SPI
|
||||
/// - BOARD_AT26_A_NPCS
|
||||
/// - BOARD_AT26_A_NPCS_PIN
|
||||
///
|
||||
/// !SD Card
|
||||
/// - MCI2_INTERFACE
|
||||
/// - BOARD_SD_MCI_BASE
|
||||
/// - BOARD_SD_MCI_ID
|
||||
/// - BOARD_SD_PINS
|
||||
/// - BOARD_SD_SLOT
|
||||
///
|
||||
/// !PSRAM
|
||||
/// - BOARD_PSRAM_PINS
|
||||
///
|
||||
/// !LCD
|
||||
/// - BOARD_LCD_ILI9325
|
||||
/// - BOARD_LCD_PINS
|
||||
/// - BOARD_BACKLIGHT_PIN
|
||||
/// - BOARD_LCD_BASE
|
||||
/// - BOARD_LCD_RS
|
||||
/// - BOARD_LCD_WIDTH
|
||||
/// - BOARD_LCD_HEIGHT
|
||||
///
|
||||
/// !TouchScreen
|
||||
/// - BOARD_TSC_ADS7843
|
||||
/// - PIN_TCS_IRQ
|
||||
/// - PIN_TCS_BUSY
|
||||
/// - BOARD_TSC_SPI_BASE
|
||||
/// - BOARD_TSC_SPI_ID
|
||||
/// - BOARD_TSC_SPI_PINS
|
||||
/// - BOARD_TSC_NPCS
|
||||
/// - BOARD_TSC_NPCS_PIN
|
||||
///
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_BASE SPI0
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_ID ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_A_SPI_PINS PINS_SPI0
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_A_SPI 0
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_BASE SPI1
|
||||
///// Identifier of SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_ID ID_SPI1
|
||||
///// Pins of the SPI peripheral connected to the dataflash.
|
||||
//#define BOARD_AT45_B_SPI_PINS PINS_SPI1
|
||||
///// Dataflahs SPI number.
|
||||
//#define BOARD_AT45_B_SPI 1
|
||||
///// Chip select connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS 3
|
||||
///// Chip select pin connected to the dataflash.
|
||||
//#define BOARD_AT45_B_NPCS_PIN PIN_SPI1_NPCS3
|
||||
|
||||
/// Base address of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_BASE SPI0
|
||||
///// Identifier of SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_ID ID_SPI0
|
||||
///// Pins of the SPI peripheral connected to the serialflash.
|
||||
//#define BOARD_AT26_A_SPI_PINS PINS_SPI0
|
||||
///// Serialflash SPI number.
|
||||
//#define BOARD_AT26_A_SPI 0
|
||||
///// Chip select connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS 3
|
||||
///// Chip select pin connected to the serialflash.
|
||||
//#define BOARD_AT26_A_NPCS_PIN PIN_SPI0_NPCS3
|
||||
|
||||
/// ISO7816
|
||||
/// - PIN_SMARTCARD_CONNECT
|
||||
/// - PIN_ISO7816_RSTMC
|
||||
/// - PINS_ISO7816
|
||||
|
||||
/// Smartcard detection pin
|
||||
//#define PIN_SMARTCARD_CONNECT {1 << 5, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
|
||||
/// PIN used for reset the smartcard
|
||||
//#define PIN_ISO7816_RSTMC {1 << 7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/// Pins used for connect the smartcard
|
||||
//#define PINS_ISO7816 PIN_USART0_TXD, PIN_USART0_SCK, PIN_ISO7816_RSTMC
|
||||
|
||||
/// Dma channel number
|
||||
#define BOARD_MCI_DMA_CHANNEL 0
|
||||
/// MCI0 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI0 AT91C_HDMA_SRC_PER_0
|
||||
#define DMA_HW_DEST_REQ_ID_MCI0 AT91C_HDMA_DST_PER_0
|
||||
/// MCI1 DMA hardware handshaking ID
|
||||
#define DMA_HW_SRC_REQ_ID_MCI1 AT91C_HDMA_SRC_PER_13
|
||||
#define DMA_HW_DEST_REQ_ID_MCI1 AT91C_HDMA_DST_PER_13
|
||||
/// SD DMA hardware handshaking ID
|
||||
#define BOARD_SD_DMA_HW_SRC_REQ_ID DMA_HW_SRC_REQ_ID_MCI0
|
||||
#define BOARD_SD_DMA_HW_DEST_REQ_ID DMA_HW_DEST_REQ_ID_MCI0
|
||||
|
||||
|
||||
/// HS MCI interface
|
||||
#define MCI2_INTERFACE
|
||||
/// Base address of the MCI peripheral connected to the SD card.
|
||||
#define BOARD_SD_MCI_BASE MCI0//MCI
|
||||
///// Peripheral identifier of the MCI connected to the SD card.
|
||||
#define BOARD_SD_MCI_ID AT91C_ID_MCI0 ID_MCI0 //ID_MCI
|
||||
///// MCI pins that shall be configured to access the SD card.
|
||||
#define BOARD_SD_PINS PINS_MCI
|
||||
///// MCI slot to which the SD card is connected to.
|
||||
#define BOARD_SD_SLOT MCI_SD_SLOTA
|
||||
///// MCI Card Detect pin.
|
||||
#define BOARD_SD_PIN_CD PIN_MCI_CD
|
||||
|
||||
/*
|
||||
#define BOARD_PSRAM_PINS PIN_EBI_DATA_BUS, PIN_EBI_NCS0, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_PSRAM_ADDR_BUS, PIN_EBI_PSRAM_NBS, PIN_EBI_A1
|
||||
*/
|
||||
|
||||
/** Indicates board has an ILI9325 external component to manage LCD. */
|
||||
#define BOARD_LCD_ILI9325
|
||||
|
||||
/** LCD pins definition. */
|
||||
#define BOARD_LCD_PINS PIN_EBI_DATA_BUS, PIN_EBI_NRD, PIN_EBI_NWE, \
|
||||
PIN_EBI_NCS1, PIN_EBI_LCD_RS
|
||||
/** Backlight pin definition. */
|
||||
#define BOARD_BACKLIGHT_PIN {1 << 13, PIOC, ID_PIOC, PIO_OUTPUT_0, PIO_DEFAULT}
|
||||
/** Define ILI9325 base address. */
|
||||
#define BOARD_LCD_BASE 0x61000000
|
||||
/** Define ILI9325 register select signal. */
|
||||
#define BOARD_LCD_RS (1 << 1)
|
||||
/** Display width in pixels. */
|
||||
#define BOARD_LCD_WIDTH 240
|
||||
/** Display height in pixels. */
|
||||
#define BOARD_LCD_HEIGHT 320
|
||||
|
||||
/** Indicates board has an ADS7843 external component to manage Touch Screen */
|
||||
#define BOARD_TSC_ADS7843
|
||||
|
||||
#ifdef BOARD_REV_A
|
||||
/** Touchscreen controller IRQ pin definition. */
|
||||
#define PIN_TCS_IRQ {PIO_PA4, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||
#define PIN_TCS_IRQ_WUP_ID (1 << 3)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TCS_BUSY {PIO_PA5, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
#ifdef BOARD_REV_B
|
||||
/** Touchscreen controller IRQ pin definition. */
|
||||
#define PIN_TCS_IRQ {PIO_PA16, PIOA, ID_PIOA, PIO_INPUT, PIO_DEBOUNCE | PIO_IT_AIME | PIO_IT_EDGE}
|
||||
#define PIN_TCS_IRQ_WUP_ID (1 << 15)
|
||||
/** Touchscreen controller Busy pin definition. */
|
||||
#define PIN_TCS_BUSY {PIO_PA17, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
|
||||
#endif
|
||||
|
||||
/** Base address of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_BASE SPI
|
||||
/** Identifier of SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_ID ID_SPI
|
||||
/** Pins of the SPI peripheral connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_SPI_PINS PINS_SPI
|
||||
/** Chip select connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS 0
|
||||
/** Chip select pin connected to the touchscreen controller. */
|
||||
#define BOARD_TSC_NPCS_PIN PIN_SPI_NPCS0_PA11
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_mem "SAM3S-EK - Memories"
|
||||
/// This page lists definitions related to internal & external on-board memories.
|
||||
///
|
||||
/// !Embedded Flash
|
||||
/// - BOARD_FLASH_EFC
|
||||
|
||||
/// Internal SRAM address
|
||||
#define AT91C_ISRAM AT91C_IRAM
|
||||
#define AT91C_ISRAM_SIZE 0x00008000
|
||||
|
||||
#define AT91C_IFLASH_SIZE (0x40000)
|
||||
#define AT91C_IFLASH_PAGE_SIZE (256) // Internal FLASH 0 Page Size: 256 bytes
|
||||
#define AT91C_IFLASH_NB_OF_PAGES (1024) // Internal FLASH 0 Number of Pages: 512
|
||||
#define AT91C_IFLASH_LOCK_REGION_SIZE (16384) // Internal FLASH 0 Lock Region Size: 16 Kbytes
|
||||
#define AT91C_IFLASH_NB_OF_LOCK_BITS (16) // Internal FLASH 0 Number of Lock Bits: 16
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \section sam3s_ek_extcomp "SAM3S-EK - External components"
|
||||
/// This page lists the definitions related to external on-board components
|
||||
/// located in the board.h file for the SAM3S-EK.
|
||||
///
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/// \par sam3s_ek_chipdef "SAM3S-EK - Individual chip definition"
|
||||
/// This page lists the definitions related to different chip's definition
|
||||
/// located in the board.h file for the SAM3S-EK.
|
||||
|
||||
/// DBGU
|
||||
#define BOARD_DBGU_ID ID_DBGU
|
||||
|
||||
/// Rtc
|
||||
#define BOARD_RTC_ID ID_RTC
|
||||
|
||||
/// Twi eeprom
|
||||
#define BOARD_ID_TWI_EEPROM ID_TWI1
|
||||
#define BOARD_BASE_TWI_EEPROM TWI1
|
||||
#define BOARD_PINS_TWI_EEPROM PINS_TWI1
|
||||
|
||||
/// USART
|
||||
#define BOARD_PIN_USART_RXD PIN_USART1_RXD
|
||||
#define BOARD_PIN_USART_TXD PIN_USART1_TXD
|
||||
#define BOARD_PIN_USART_CTS PIN_USART1_CTS
|
||||
#define BOARD_PIN_USART_RTS PIN_USART1_RTS
|
||||
#define BOARD_PIN_USART_EN PIN_USART1_EN
|
||||
#define BOARD_USART_BASE USART1
|
||||
#define BOARD_ID_USART ID_USART1
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#define PIN_EBI_NANDOE {1 << 9, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDWE {1 << 10, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDCLE {1 << 17, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDALE {1 << 16, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
#define PIN_EBI_NANDIO {0x000000FF, PIOC, ID_PIOC, PIO_PERIPH_A, PIO_PULLUP}
|
||||
|
||||
/// Nandflash chip enable pin definition.
|
||||
#define BOARD_NF_CE_PIN {1 << 14, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
|
||||
/// Nandflash ready/busy pin definition.
|
||||
#define BOARD_NF_RB_PIN {1 << 18, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP}
|
||||
|
||||
/// Nandflash controller peripheral pins definition.
|
||||
#define PINS_NANDFLASH PIN_EBI_NANDIO, BOARD_NF_CE_PIN, BOARD_NF_RB_PIN, PIN_EBI_NANDOE, \
|
||||
PIN_EBI_NANDWE, PIN_EBI_NANDCLE, PIN_EBI_NANDALE
|
||||
|
||||
/// Address for transferring command bytes to the nandflash.
|
||||
#define BOARD_NF_COMMAND_ADDR 0x60400000
|
||||
/// Address for transferring address bytes to the nandflash.
|
||||
#define BOARD_NF_ADDRESS_ADDR 0x60200000
|
||||
/// Address for transferring data bytes to the nandflash.
|
||||
#define BOARD_NF_DATA_ADDR 0x60000000
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -39,7 +39,7 @@
|
|||
* Headers
|
||||
*----------------------------------------------------------------------------*/
|
||||
|
||||
//#include "board.h"
|
||||
#include "board.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Local definitions
|
||||
|
|
|
|||
|
|
@ -62,38 +62,9 @@ uint32_t Card_CSD[4] ;
|
|||
uint32_t Card_state = SD_ST_EMPTY ;
|
||||
uint32_t Sd_128_resp[4] ;
|
||||
uint32_t Sd_rca ;
|
||||
//uint32_t Cmd_55_resp ;
|
||||
uint32_t Cmd_8_resp ;
|
||||
uint32_t Cmd_A41_resp ;
|
||||
|
||||
/**
|
||||
* Initializes a MCI peripheral.
|
||||
*/
|
||||
void SD_Init()
|
||||
{
|
||||
unsigned short clkDiv;
|
||||
Hsmci *pMciHw = HSMCI ;
|
||||
|
||||
/* Enable the MCI peripheral */
|
||||
PMC->PMC_PCER0 |= 1 << ID_HSMCI ; // Enable peripheral clock to HSMCI
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_SWRST; /* Reset the MCI */
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; /* Disable the MCI */
|
||||
pMciHw->HSMCI_IDR = 0xFFFFFFFF; /* Disable all the interrupts */
|
||||
pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC | HSMCI_DTOR_DTOMUL ; /* Set the Data Timeout Register */
|
||||
pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC | HSMCI_CSTOR_CSTOMUL ; /* CSTOR ? */
|
||||
/* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */
|
||||
clkDiv = (Master_frequency / (MCI_INITIAL_SPEED * 2)) - 1;
|
||||
pMciHw->HSMCI_MR = clkDiv | (7 << 8) ;
|
||||
|
||||
/* Set the SDCard Register 1-bit, slot A */
|
||||
pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ;
|
||||
/* Enable the MCI and the Power Saving */
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN | HSMCI_CR_PWSEN ;
|
||||
/* Configure MCI */
|
||||
pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE | ((1 << 4) & HSMCI_CFG_FERRCTRL);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available
|
||||
*
|
||||
|
|
@ -108,14 +79,15 @@ uint32_t SD_SetBusWidth( uint32_t busWidth)
|
|||
return (uint32_t)-1;
|
||||
}
|
||||
|
||||
busWidth &= HSMCI_SDCR_SDCBUS ;
|
||||
busWidth &= HSMCI_SDCR_SDCBUS_Msk ;
|
||||
|
||||
mciSdcr = (HSMCI->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS));
|
||||
mciSdcr = (HSMCI->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk));
|
||||
HSMCI->HSMCI_SDCR = mciSdcr | busWidth;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if 0
|
||||
/**
|
||||
* Configure the MCI_CFG to enable the HS mode
|
||||
* \param hsEnable 1 to enable, 0 to disable HS mode.
|
||||
|
|
@ -136,7 +108,7 @@ void SD_EnableHsMode( uint8_t hsEnable)
|
|||
|
||||
HSMCI->HSMCI_CFG = cfgr;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is
|
||||
|
|
@ -149,7 +121,7 @@ uint32_t SD_SetSpeed( uint32_t mciSpeed )
|
|||
uint32_t mciMr;
|
||||
uint32_t clkdiv;
|
||||
|
||||
mciMr = HSMCI->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV);
|
||||
mciMr = HSMCI->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk);
|
||||
/* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
|
||||
* divided by (2*(CLKDIV+1))
|
||||
* mciSpeed = MCK / (2*(CLKDIV+1)) */
|
||||
|
|
@ -180,17 +152,19 @@ uint32_t SD_SetSpeed( uint32_t mciSpeed )
|
|||
return (mciSpeed);
|
||||
}
|
||||
|
||||
//void SD_SetBlklen( uint32_t blklen )
|
||||
//{
|
||||
// uint32_t mciMr;
|
||||
// uint32_t clkdiv;
|
||||
|
||||
// mciMr = HSMCI->HSMCI_MR & (~(uint32_t)HSMCI_MR_BLKLEN);
|
||||
// /* Modify MR */
|
||||
// HSMCI->HSMCI_MR = mciMr | blklen << 16 ;
|
||||
//}
|
||||
#if 0
|
||||
void SD_SetBlklen( uint32_t blklen )
|
||||
{
|
||||
uint32_t mciMr;
|
||||
uint32_t clkdiv;
|
||||
|
||||
mciMr = HSMCI->HSMCI_MR & (~(uint32_t)HSMCI_MR_BLKLEN);
|
||||
/* Modify MR */
|
||||
HSMCI->HSMCI_MR = mciMr | blklen << 16 ;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
/**
|
||||
* Reset MCI HW interface and disable it.
|
||||
* \param keepSettings Keep old register settings, including
|
||||
|
|
@ -223,7 +197,7 @@ void SD_Reset( uint8_t keepSettings)
|
|||
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; // Disable
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void sd_cmd55()
|
||||
{
|
||||
|
|
@ -422,26 +396,24 @@ uint32_t sd_cmd7()
|
|||
}
|
||||
}
|
||||
|
||||
#define HSMCI_CMDR_SPCMD_STD ( 0 << 8 )
|
||||
#define HSMCI_CMDR_RSPTYP_48_BIT ( 1 << 6 )
|
||||
#define HSMCI_CMDR_TRCMD_START_DATA ( 1 << 16 )
|
||||
#define HSMCI_CMDR_TRDIR_READ ( 1 << 18 )
|
||||
#define HSMCI_CMDR_TRTYP_SINGLE ( 0 << 19 )
|
||||
#define HSMCI_CMDR_TRTYP_MULTIPLE ( 1 << 19 )
|
||||
|
||||
#define SD_SEND_SCR (51 | HSMCI_CMDR_SPCMD_STD | HSMCI_CMDR_RSPTYP_48_BIT \
|
||||
| HSMCI_CMDR_TRCMD_START_DATA | HSMCI_CMDR_TRDIR_READ \
|
||||
| HSMCI_CMDR_TRTYP_SINGLE | HSMCI_CMDR_MAXLAT)
|
||||
|
||||
#define SDMMC_SET_BLOCKLEN (16 | HSMCI_CMDR_TRCMD_NO_DATA \
|
||||
| HSMCI_CMDR_SPCMD_STD \
|
||||
| HSMCI_CMDR_RSPTYP_48_BIT \
|
||||
| HSMCI_CMDR_MAXLAT_64 )
|
||||
|
||||
#define SD_READ_SINGLE_BLOCK (17 | HSMCI_CMDR_SPCMD_STD | HSMCI_CMDR_RSPTYP_48_BIT \
|
||||
| HSMCI_CMDR_TRCMD_START_DATA | HSMCI_CMDR_TRDIR_READ \
|
||||
| HSMCI_CMDR_TRTYP_SINGLE | HSMCI_CMDR_MAXLAT)
|
||||
|
||||
#define SD_WRITE_BLOCK (24 | HSMCI_CMDR_SPCMD_STD \
|
||||
#define SD_WRITE_SINGLE_BLOCK (24 | HSMCI_CMDR_SPCMD_STD \
|
||||
| HSMCI_CMDR_RSPTYP_48_BIT \
|
||||
| HSMCI_CMDR_TRCMD_START_DATA \
|
||||
| HSMCI_CMDR_TRTYP_MULTIPLE \
|
||||
| HSMCI_CMDR_TRDIR_READ \
|
||||
| HSMCI_CMDR_TRDIR_WRITE \
|
||||
| HSMCI_CMDR_TRTYP_SINGLE \
|
||||
| HSMCI_CMDR_MAXLAT)
|
||||
|
||||
// Get SCR
|
||||
|
|
@ -618,93 +590,73 @@ uint32_t sd_card_ready( void )
|
|||
return 0 ;
|
||||
}
|
||||
|
||||
uint32_t sd_read_block( uint32_t block_no, uint32_t *data )
|
||||
uint32_t sd_read_block( uint32_t block_no, uint32_t *dat )
|
||||
{
|
||||
if ( Card_state == SD_ST_DATA )
|
||||
{
|
||||
uint32_t i ;
|
||||
uint32_t j = 0 ;
|
||||
if (Card_state == SD_ST_DATA) {
|
||||
Hsmci *phsmci = HSMCI;
|
||||
|
||||
if ( CardIsConnected() )
|
||||
{
|
||||
if (CardIsConnected()) {
|
||||
for (uint8_t i = 0; i < 3; i++) {
|
||||
uint32_t *data = dat;
|
||||
uint32_t j = 0;
|
||||
// Block size = 512, nblocks = 1
|
||||
phsmci->HSMCI_BLKR = ((512) << 16) | 1;
|
||||
phsmci->HSMCI_ARGR = block_no << 9;
|
||||
phsmci->HSMCI_CMDR = SD_READ_SINGLE_BLOCK;
|
||||
phsmci->HSMCI_MR &= ~HSMCI_MR_PDCMODE;
|
||||
phsmci->HSMCI_MR |= (512 << 16);
|
||||
|
||||
for ( i = 0 ; i < 50000 ; i += 1 )
|
||||
{
|
||||
if ( phsmci->HSMCI_SR & HSMCI_SR_RXRDY )
|
||||
{
|
||||
while (1) {
|
||||
if (phsmci->HSMCI_SR & HSMCI_SR_RXRDY) {
|
||||
*data++ = phsmci->HSMCI_RDR;
|
||||
j += 1;
|
||||
}
|
||||
if ( ( phsmci->HSMCI_SR & ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) ) == ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) )
|
||||
{
|
||||
break ;
|
||||
|
||||
if (j >= 128) {
|
||||
return 1;
|
||||
}
|
||||
if ( j >= 128 )
|
||||
{
|
||||
|
||||
if ((phsmci->HSMCI_SR & (HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE)) == (HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE)) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
return i | (j << 16) ; //phsmci->HSMCI_RSPR[0] ;
|
||||
}
|
||||
else
|
||||
{
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0 ;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t sd_write_block( uint32_t block_no, uint32_t *data )
|
||||
{
|
||||
if ( Card_state == SD_ST_DATA )
|
||||
{
|
||||
uint32_t i ;
|
||||
if (Card_state == SD_ST_DATA) {
|
||||
uint32_t j = 0;
|
||||
Hsmci *phsmci = HSMCI;
|
||||
|
||||
if ( CardIsConnected() )
|
||||
{
|
||||
if (CardIsConnected()) {
|
||||
// Block size = 512, nblocks = 1
|
||||
phsmci->HSMCI_BLKR = ((512) << 16) | 1;
|
||||
phsmci->HSMCI_ARGR = block_no << 9;
|
||||
phsmci->HSMCI_CMDR = SD_WRITE_BLOCK ;
|
||||
phsmci->HSMCI_CMDR = SD_WRITE_SINGLE_BLOCK;
|
||||
phsmci->HSMCI_MR &= ~(HSMCI_MR_WRPROOF | HSMCI_MR_RDPROOF | HSMCI_MR_BLKLEN_Msk | HSMCI_MR_PDCMODE);
|
||||
phsmci->HSMCI_MR |= (512 << 16);
|
||||
|
||||
for ( i = 0 ; i < 50000 ; i += 1 )
|
||||
{
|
||||
if ( phsmci->HSMCI_SR & HSMCI_SR_TXRDY )
|
||||
{
|
||||
while (1) {
|
||||
if (j >= 128) {
|
||||
while (~phsmci->HSMCI_SR & HSMCI_SR_NOTBUSY)
|
||||
;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (phsmci->HSMCI_SR & HSMCI_SR_TXRDY) {
|
||||
phsmci->HSMCI_TDR = *data++;
|
||||
j += 1;
|
||||
}
|
||||
if ( ( phsmci->HSMCI_SR & ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) ) == ( HSMCI_SR_CMDRDY | HSMCI_SR_XFRDONE ) )
|
||||
{
|
||||
break ;
|
||||
}
|
||||
if ( j >= 128 )
|
||||
{
|
||||
break ;
|
||||
}
|
||||
}
|
||||
return i | (j << 16) ; //phsmci->HSMCI_RSPR[0] ;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0 ;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
Notes on SD card:
|
||||
|
|
@ -808,9 +760,6 @@ Now decide what the card can do!
|
|||
#define LDIR_Chksum 13
|
||||
#define LDIR_FstClusLO 26
|
||||
|
||||
static volatile
|
||||
DSTATUS Stat = STA_NOINIT; /* Disk status */
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
|
@ -991,8 +940,6 @@ DRESULT disk_ioctl (
|
|||
#endif
|
||||
}
|
||||
else {
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
switch (ctrl) {
|
||||
case CTRL_SYNC : /* Make sure that no pending write process. Do not remove this or written sector might not left updated. */
|
||||
/* BSS if (select()) {
|
||||
|
|
|
|||
|
|
@ -36,7 +36,26 @@ void init_SDcard()
|
|||
#ifndef SIMU
|
||||
configure_pins( 0xFC000000, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_C | PIN_PORTA | PIN_NO_PULLUP ) ;
|
||||
configure_pins( PIO_PB7, PIN_INPUT | PIN_PORTB | PIN_NO_PULLUP | PIN_NO_PULLDOWN ) ;
|
||||
SD_Init() ;
|
||||
|
||||
unsigned short clkDiv;
|
||||
Hsmci *pMciHw = HSMCI ;
|
||||
|
||||
/* Enable the MCI peripheral */
|
||||
PMC->PMC_PCER0 |= 1 << ID_HSMCI ; // Enable peripheral clock to HSMCI
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_SWRST; /* Reset the MCI */
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; /* Disable the MCI */
|
||||
pMciHw->HSMCI_IDR = 0xFFFFFFFF; /* Disable all the interrupts */
|
||||
pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; /* Set the Data Timeout Register */
|
||||
pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; /* CSTOR ? */
|
||||
/* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */
|
||||
clkDiv = (Master_frequency / (MCI_INITIAL_SPEED * 2)) - 1;
|
||||
pMciHw->HSMCI_MR = clkDiv | (7 << 8) ;
|
||||
|
||||
/* Set the SDCard Register 1-bit, slot A */
|
||||
pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ;
|
||||
/* Enable the MCI and the Power Saving */
|
||||
pMciHw->HSMCI_CR = HSMCI_CR_MCIEN | HSMCI_CR_PWSEN ;
|
||||
/* Configure MCI */
|
||||
pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE | ((1 << 4) & HSMCI_CFG_FERRCTRL);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,38 +0,0 @@
|
|||
/*
|
||||
* Authors (alphabetical order)
|
||||
* - Bertrand Songis <bsongis@gmail.com>
|
||||
* - Bryan J. Rentoul (Gruvin) <gruvin@gmail.com>
|
||||
* - Cameron Weeks <th9xer@gmail.com>
|
||||
* - Erez Raviv
|
||||
* - Jean-Pierre Parisy
|
||||
* - Karl Szmutny <shadow@privy.de>
|
||||
* - Michael Blandford
|
||||
* - Michal Hlavinka
|
||||
* - Pat Mackenzie
|
||||
* - Philip Moss
|
||||
* - Rob Thomson
|
||||
* - Romolo Manfredini <romolo.manfredini@gmail.com>
|
||||
* - Thomas Husterer
|
||||
*
|
||||
* open9x is based on code named
|
||||
* gruvin9x by Bryan J. Rentoul: http://code.google.com/p/gruvin9x/,
|
||||
* er9x by Erez Raviv: http://code.google.com/p/er9x/,
|
||||
* and the original (and ongoing) project by
|
||||
* Thomas Husterer, th9x: http://code.google.com/p/th9x/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "diskio.h"
|
||||
#include "ff.h"
|
||||
|
||||
extern void init_SDcard( void ) ;
|
||||
|
||||
|
|
@ -142,6 +142,11 @@ bool listSDcardModels()
|
|||
s_menu_flags = BSS;
|
||||
uint8_t offset = 0;
|
||||
|
||||
FRESULT result = f_mount(0, &g_FATFS_Obj);
|
||||
if (result != FR_OK) {
|
||||
return SDCARD_ERROR(result);
|
||||
}
|
||||
|
||||
FRESULT res = f_opendir(&dir, MODELS_PATH); /* Open the directory */
|
||||
if (res == FR_OK) {
|
||||
for (;;) {
|
||||
|
|
@ -177,15 +182,17 @@ bool listSDcardModels()
|
|||
|
||||
return s_menu_count;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void menuProcModelSelect(uint8_t event)
|
||||
{
|
||||
TITLE(STR_MENUMODELSEL);
|
||||
|
||||
#if defined(SDCARD)
|
||||
#if defined(PCBARM)
|
||||
#define REFRESH(x)
|
||||
#elif defined(PCBV4) && defined(SDCARD)
|
||||
static bool refresh = true;
|
||||
#define REFRESH(x) refresh = (x)
|
||||
#else
|
||||
#define refresh event
|
||||
#endif
|
||||
|
|
@ -226,7 +233,7 @@ void menuProcModelSelect(uint8_t event)
|
|||
) {
|
||||
eeFlush(); // flush eeprom write
|
||||
#if defined(SDCARD)
|
||||
refresh = true;
|
||||
REFRESH(true);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
|
@ -442,7 +449,7 @@ void menuProcModelSelect(uint8_t event)
|
|||
}
|
||||
|
||||
#if defined(SDCARD)
|
||||
refresh = false;
|
||||
REFRESH(false);
|
||||
if (s_sdcard_error) {
|
||||
s_warning = s_sdcard_error;
|
||||
displayWarning(event);
|
||||
|
|
@ -455,7 +462,7 @@ void menuProcModelSelect(uint8_t event)
|
|||
if (s_menu_count) {
|
||||
const char * result = displayMenu(event);
|
||||
if (result) {
|
||||
refresh = true;
|
||||
REFRESH(true);
|
||||
if (result == STR_SELECT_MODEL || result == STR_CREATE_MODEL) {
|
||||
displayPopup(STR_LOADINGMODEL);
|
||||
eeCheck(true); // force writing of current model data before this is changed
|
||||
|
|
@ -1478,6 +1485,7 @@ enum MixFields {
|
|||
MIX_FIELD_COUNT
|
||||
};
|
||||
|
||||
#define MIXES_2ND_COLUMN (9*FW)
|
||||
void menuProcMixOne(uint8_t event)
|
||||
{
|
||||
TITLEP(s_currCh ? STR_INSERTMIX : STR_EDITMIX);
|
||||
|
|
@ -1493,38 +1501,38 @@ void menuProcMixOne(uint8_t event)
|
|||
uint8_t attr = (sub==i ? (s_editMode>0 ? BLINK|INVERS : INVERS) : 0);
|
||||
switch(i) {
|
||||
case MIX_FIELD_SOURCE:
|
||||
lcd_puts(2*FW, y, STR_SOURCE);
|
||||
putsMixerSource(FW*10, y, md2->srcRaw, attr);
|
||||
lcd_putsLeft(y, STR_SOURCE);
|
||||
putsMixerSource(MIXES_2ND_COLUMN, y, md2->srcRaw, attr);
|
||||
if(attr) CHECK_INCDEC_MODELVAR(event, md2->srcRaw, 1, NUM_XCHNMIX);
|
||||
break;
|
||||
case MIX_FIELD_WEIGHT:
|
||||
lcd_puts(2*FW, y, STR_WEIGHT);
|
||||
lcd_outdezAtt(FW*10, y, md2->weight, attr|LEFT|INFLIGHT(md2->weight));
|
||||
lcd_putsLeft(y, STR_WEIGHT);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN, y, md2->weight, attr|LEFT|INFLIGHT(md2->weight));
|
||||
if (attr) CHECK_INFLIGHT_INCDEC_MODELVAR(event, md2->weight, -125, 125, 0, STR_MIXERWEIGHT);
|
||||
break;
|
||||
case MIX_FIELD_DIFFERENTIAL:
|
||||
// TODO INFLIGHT
|
||||
lcd_puts(2*FW, y, STR_DIFFERENTIAL);
|
||||
lcd_outdezAtt(FW*10, y, md2->differential*2, attr|LEFT);
|
||||
lcd_putsLeft(y, STR_DIFFERENTIAL);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN, y, md2->differential*2, attr|LEFT);
|
||||
if (attr) CHECK_INCDEC_MODELVAR(event, md2->differential, -50, 50);
|
||||
break;
|
||||
case MIX_FIELD_OFFSET:
|
||||
lcd_puts(2*FW, y, STR_OFFSET);
|
||||
lcd_outdezAtt(FW*10, y, md2->sOffset, attr|LEFT|INFLIGHT(md2->sOffset));
|
||||
lcd_putsLeft(y, STR_OFFSET);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN, y, md2->sOffset, attr|LEFT|INFLIGHT(md2->sOffset));
|
||||
if (attr) CHECK_INFLIGHT_INCDEC_MODELVAR(event, md2->sOffset, -125, 125, 0, STR_MIXEROFFSET);
|
||||
break;
|
||||
case MIX_FIELD_TRIM:
|
||||
{
|
||||
uint8_t not_stick = (md2->srcRaw > NUM_STICKS);
|
||||
int8_t carryTrim = -md2->carryTrim;
|
||||
lcd_puts(2*FW, y, STR_TRIM);
|
||||
lcd_putsiAtt(FW*10, y, STR_VMIXTRIMS, (not_stick && carryTrim == 0) ? 0 : carryTrim+1, attr);
|
||||
lcd_putsLeft(y, STR_TRIM);
|
||||
lcd_putsiAtt(MIXES_2ND_COLUMN, y, STR_VMIXTRIMS, (not_stick && carryTrim == 0) ? 0 : carryTrim+1, attr);
|
||||
if (attr) md2->carryTrim = -checkIncDecModel(event, carryTrim, not_stick ? TRIM_ON : -TRIM_OFF, -TRIM_AIL);
|
||||
break;
|
||||
}
|
||||
case MIX_FIELD_CURVE:
|
||||
lcd_puts(2*FW, y, STR_CURVES);
|
||||
putsCurve(FW*10, y, md2->curve, attr);
|
||||
lcd_putsLeft(y, STR_CURVES);
|
||||
putsCurve(MIXES_2ND_COLUMN, y, md2->curve, attr);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->curve, -MAX_CURVE5-MAX_CURVE9, MAX_CURVE5+MAX_CURVE9+7-1);
|
||||
if(attr && event==EVT_KEY_FIRST(KEY_MENU) && (md2->curve<0 || md2->curve>=CURVE_BASE)){
|
||||
s_curveChan = (md2->curve<0 ? -md2->curve-1 : md2->curve-CURVE_BASE);
|
||||
|
|
@ -1532,48 +1540,48 @@ void menuProcMixOne(uint8_t event)
|
|||
}
|
||||
break;
|
||||
case MIX_FIELD_SWITCH:
|
||||
lcd_puts( 2*FW,y,STR_SWITCH);
|
||||
putsSwitches(10*FW, y,md2->swtch,attr);
|
||||
lcd_putsLeft(y, STR_SWITCH);
|
||||
putsSwitches(MIXES_2ND_COLUMN, y,md2->swtch,attr);
|
||||
if(attr) CHECK_INCDEC_MODELSWITCH( event, md2->swtch, -MAX_SWITCH, MAX_SWITCH);
|
||||
break;
|
||||
#ifdef FLIGHT_PHASES
|
||||
case MIX_FIELD_FLIGHT_PHASE:
|
||||
lcd_puts( 2*FW,y,STR_FPHASE);
|
||||
putsFlightPhase(10*FW, y, md2->phase, attr);
|
||||
lcd_putsLeft(y, STR_FPHASE);
|
||||
putsFlightPhase(MIXES_2ND_COLUMN, y, md2->phase, attr);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->phase, -MAX_PHASES, MAX_PHASES);
|
||||
break;
|
||||
#endif
|
||||
case MIX_FIELD_WARNING:
|
||||
lcd_puts( 2*FW,y,STR_MIXWARNING);
|
||||
lcd_putsLeft(y, STR_MIXWARNING);
|
||||
if(md2->mixWarn)
|
||||
lcd_outdezAtt(FW*10,y,md2->mixWarn,attr|LEFT);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN,y,md2->mixWarn,attr|LEFT);
|
||||
else
|
||||
lcd_putsAtt(FW*10, y, STR_OFF, attr);
|
||||
lcd_putsAtt(MIXES_2ND_COLUMN, y, STR_OFF, attr);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->mixWarn, 0,3);
|
||||
break;
|
||||
case MIX_FIELD_MLTPX:
|
||||
lcd_puts( 2*FW,y,STR_MULTPX);
|
||||
lcd_putsiAtt(10*FW, y, STR_VMLTPX, md2->mltpx, attr);
|
||||
lcd_putsLeft(y, STR_MULTPX);
|
||||
lcd_putsiAtt(MIXES_2ND_COLUMN, y, STR_VMLTPX, md2->mltpx, attr);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->mltpx, 0, 2);
|
||||
break;
|
||||
case MIX_FIELD_DELAY_UP:
|
||||
lcd_puts( 2*FW,y,STR_DELAYUP);
|
||||
lcd_outdezAtt(FW*16,y,md2->delayUp,attr);
|
||||
lcd_putsLeft(y, STR_DELAYUP);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN,y,md2->delayUp,attr|LEFT);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->delayUp, 0, 15);
|
||||
break;
|
||||
case MIX_FIELD_DELAY_DOWN:
|
||||
lcd_puts( 2*FW,y,STR_DELAYDOWN);
|
||||
lcd_outdezAtt(FW*16,y,md2->delayDown,attr);
|
||||
lcd_putsLeft(y, STR_DELAYDOWN);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN,y,md2->delayDown,attr|LEFT);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->delayDown, 0, 15);
|
||||
break;
|
||||
case MIX_FIELD_SLOW_UP:
|
||||
lcd_puts( 2*FW,y,STR_SLOWUP);
|
||||
lcd_outdezAtt(FW*16,y,md2->speedUp,attr);
|
||||
lcd_putsLeft(y, STR_SLOWUP);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN,y,5*md2->speedUp,attr|PREC1|LEFT);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->speedUp, 0, 15);
|
||||
break;
|
||||
case MIX_FIELD_SLOW_DOWN:
|
||||
lcd_puts( 2*FW,y,STR_SLOWDOWN);
|
||||
lcd_outdezAtt(FW*16,y,md2->speedDown,attr);
|
||||
lcd_putsLeft(y, STR_SLOWDOWN);
|
||||
lcd_outdezAtt(MIXES_2ND_COLUMN,y,5*md2->speedDown,attr|PREC1|LEFT);
|
||||
if(attr) CHECK_INCDEC_MODELVAR( event, md2->speedDown, 0, 15);
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -799,11 +799,18 @@ void doSplash()
|
|||
{
|
||||
if(!g_eeGeneral.disableSplashScreen)
|
||||
{
|
||||
checkBacklight() ;
|
||||
lcd_clear();
|
||||
lcd_img(0, 0, splash_lbm, 0, 0);
|
||||
refreshDisplay();
|
||||
|
||||
#if defined(PCBSTD)
|
||||
lcdSetRefVolt(g_eeGeneral.contrast);
|
||||
#else
|
||||
uint16_t curTime = get_tmr10ms() + 6;
|
||||
uint8_t contrast = 10;
|
||||
lcdSetRefVolt(contrast);
|
||||
#endif
|
||||
|
||||
clearKeyEvents();
|
||||
|
||||
#ifndef SIMU
|
||||
|
|
@ -813,7 +820,7 @@ void doSplash()
|
|||
|
||||
uint16_t inacSum = stickMoveValue();
|
||||
|
||||
uint16_t tgtime = get_tmr10ms() + SPLASH_TIMEOUT; //2sec splash screen
|
||||
uint16_t tgtime = get_tmr10ms() + SPLASH_TIMEOUT;
|
||||
while (tgtime != get_tmr10ms())
|
||||
{
|
||||
#ifdef SIMU
|
||||
|
|
@ -828,6 +835,16 @@ void doSplash()
|
|||
|
||||
if (check_soft_power() > e_power_trainer) return; // Usb on or power off
|
||||
|
||||
#if !defined(PCBSTD)
|
||||
if (curTime < get_tmr10ms()) {
|
||||
curTime += 6;
|
||||
if (contrast < g_eeGeneral.contrast) {
|
||||
contrast += 1;
|
||||
lcdSetRefVolt(contrast);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
checkBacklight();
|
||||
}
|
||||
}
|
||||
|
|
@ -1838,8 +1855,8 @@ void perOut()
|
|||
int32_t rate = (int32_t)DEL_MULT*2048*100;
|
||||
if(md->weight) rate /= abs(md->weight);
|
||||
|
||||
act[i] = (diff>0) ? ((md->speedUp>0) ? act[i]+(rate)/((int16_t)100*md->speedUp) : (int32_t)v*DEL_MULT) :
|
||||
((md->speedDown>0) ? act[i]-(rate)/((int16_t)100*md->speedDown) : (int32_t)v*DEL_MULT) ;
|
||||
act[i] = (diff>0) ? ((md->speedUp>0) ? act[i]+(rate)/((int16_t)200*md->speedUp) : (int32_t)v*DEL_MULT) :
|
||||
((md->speedDown>0) ? act[i]-(rate)/((int16_t)200*md->speedDown) : (int32_t)v*DEL_MULT) ;
|
||||
}
|
||||
|
||||
{
|
||||
|
|
|
|||
|
|
@ -439,7 +439,7 @@ extern Key keys[NUM_KEYS];
|
|||
#define DSW_SW6 15
|
||||
|
||||
#define THRCHK_DEADBAND 16
|
||||
#define SPLASH_TIMEOUT (4*100) //400 msec - 4 seconds
|
||||
#define SPLASH_TIMEOUT (4*100) // 4 seconds
|
||||
|
||||
#define TRM_BASE TRM_LH_DWN
|
||||
|
||||
|
|
@ -605,13 +605,8 @@ extern uint8_t s_eeDirtyMsk;
|
|||
#define STORE_GENERALVARS eeDirty(EE_GENERAL)
|
||||
|
||||
#if defined (PCBARM)
|
||||
#ifndef SIMU
|
||||
#define BACKLIGHT_ON (PWM->PWM_CH_NUM[0].PWM_CDTY = g_eeGeneral.backlightBright)
|
||||
#define BACKLIGHT_OFF (PWM->PWM_CH_NUM[0].PWM_CDTY = 100)
|
||||
#else
|
||||
#define BACKLIGHT_ON
|
||||
#define BACKLIGHT_OFF
|
||||
#endif
|
||||
#ifdef REVB
|
||||
#define NUMBER_ANALOG 9
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#include "open9x.h"
|
||||
|
||||
uint8_t s_pulses_paused = 0;
|
||||
uint8_t s_current_protocol ;
|
||||
uint8_t s_current_protocol = 255;
|
||||
uint8_t pxxFlag = 0 ;
|
||||
|
||||
uint16_t Pulses[18] = { 2000, 2200, 2400, 2600, 2800, 3000, 3200, 3400, 9000, 0, 0, 0,0,0,0,0,0, 0 } ;
|
||||
|
|
|
|||
|
|
@ -44,6 +44,7 @@ FILE *fp = NULL;
|
|||
|
||||
#if defined(PCBARM)
|
||||
Pio Pioa, Piob, Pioc;
|
||||
Pwm pwm;
|
||||
Twi Twio;
|
||||
Usart Usart0;
|
||||
uint32_t eeprom_pointer;
|
||||
|
|
|
|||
|
|
@ -110,6 +110,9 @@ extern Usart Usart0;
|
|||
#define PIOC (&Pioc)
|
||||
#undef TWI0
|
||||
#define TWI0 (&Twio)
|
||||
extern Pwm pwm;
|
||||
#undef PWM
|
||||
#define PWM (&pwm)
|
||||
extern uint32_t eeprom_pointer;
|
||||
extern char* eeprom_buffer_data;
|
||||
extern volatile int32_t eeprom_buffer_size;
|
||||
|
|
|
|||
13
src/simu.cpp
13
src/simu.cpp
|
|
@ -416,13 +416,16 @@ void Open9xSim::refreshDiplay()
|
|||
{
|
||||
if (lcd_refresh) {
|
||||
lcd_refresh = false;
|
||||
#if defined(PCBV4)
|
||||
if(portc & 1<<OUT_C_LIGHT) bmf->setOffColor(FXRGB(150,200,152));
|
||||
else bmf->setOffColor(FXRGB(200,200,200));
|
||||
#if defined(PCBARM)
|
||||
if (PWM->PWM_CH_NUM[0].PWM_CDTY != 100)
|
||||
#elif defined(PCBV4)
|
||||
if (portc & 1<<OUT_C_LIGHT)
|
||||
#else
|
||||
if(portb & 1<<OUT_B_LIGHT) bmf->setOffColor(FXRGB(150,200,152));
|
||||
else bmf->setOffColor(FXRGB(200,200,200));
|
||||
if (portb & 1<<OUT_B_LIGHT)
|
||||
#endif
|
||||
bmf->setOffColor(FXRGB(150,200,152));
|
||||
else
|
||||
bmf->setOffColor(FXRGB(200,200,200));
|
||||
|
||||
for(int x=0;x<W;x++){
|
||||
for(int y=0;y<H;y++)
|
||||
|
|
|
|||
|
|
@ -269,9 +269,9 @@
|
|||
#define TR_MIXWARNING "Warning"
|
||||
#define TR_OFF "OFF"
|
||||
#define TR_MULTPX "Multpx"
|
||||
#define TR_DELAYDOWN "Delay Down"
|
||||
#define TR_DELAYDOWN "Delay Dn"
|
||||
#define TR_DELAYUP "Delay Up"
|
||||
#define TR_SLOWDOWN "Slow Down"
|
||||
#define TR_SLOWDOWN "Slow Dn"
|
||||
#define TR_SLOWUP "Slow Up"
|
||||
#define TR_MIXER "MIXER"
|
||||
#define TR_CV "CV"
|
||||
|
|
|
|||
|
|
@ -12,9 +12,10 @@ if __name__ == "__main__":
|
|||
if "en" in sys.argv:
|
||||
for i in range(20):
|
||||
generate(str(i), i)
|
||||
for i in range(20, 100+1, 10):
|
||||
for i in range(20, 100, 10):
|
||||
generate(str(i), 20+(i-20)/10)
|
||||
generate("1000", 29)
|
||||
generate("hundred", 28)
|
||||
generate("thousand", 29)
|
||||
for i, s in enumerate(["hour", "hours", "minute", "minutes", "second", "seconds", "", "and", "minus"]):
|
||||
generate(s, 40+i)
|
||||
for i, s in enumerate(["volts", "amps", "meters per second", "", "km per hour", "meters", "degrees", "percent", "milliamps"]):
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue