diff --git a/radio/src/translations/cz.h.txt b/radio/src/translations/cz.h.txt index 70f093158..4b740c431 100644 --- a/radio/src/translations/cz.h.txt +++ b/radio/src/translations/cz.h.txt @@ -508,9 +508,12 @@ #elif defined(PCBFLAMENCO) #define TR_POTS_VSRCRAW "SD\0 ""LS\0 ""RS\0 " #define TR_SW_VSRCRAW "SA\0 ""SB\0 ""SC\0 ""SE\0 ""SF\0 " -#elif defined(PCBX9E) +#elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310S1\0 ""\310S2\0 ""\310S3\0 ""\310S4\0 ""\311LS\0 ""\311RS\0 ""\311LS2 ""\311RS2 " #define TR_SW_VSRCRAW "\312SA\0 ""\312SB\0 ""\312SC\0 ""\312SD\0 ""\312SE\0 ""\312SF\0 ""\312SG\0 ""\312SH\0 ""\312SI\0 ""\312SJ\0 ""\312SK\0 ""\312SL\0 ""\312SM\0 ""\312SN\0 ""\312SO\0 ""\312SP\0 ""\312SQ\0 ""\312SR\0 " +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0 ""\310S2\0 ""\310S3\0 ""\311LS\0 ""\311RS\0 " #define TR_SW_VSRCRAW "\312SA\0 ""\312SB\0 ""\312SC\0 ""\312SD\0 ""\312SE\0 ""\312SF\0 ""\312SG\0 ""\312SH\0 " diff --git a/radio/src/translations/de.h.txt b/radio/src/translations/de.h.txt index caf9c59f4..847860c3e 100644 --- a/radio/src/translations/de.h.txt +++ b/radio/src/translations/de.h.txt @@ -517,7 +517,7 @@ #endif #if defined(PCBHORUS) - #define TR_POTS_VSRCRAW "\310S1\0""\3106P\0""\310S2\0""\311S3\0""\311S4\0""\311LS\0""\311RS\0""\310JSx""\310JSy" + #define TR_POTS_VSRCRAW "\310S1\0""\3106P\0""\310S2\0""\313L1\0""\313L2\0""\311LS\0""\311RS\0""\310JSx""\310JSy" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" #elif defined(PCBFLAMENCO) #define TR_POTS_VSRCRAW "SD\0 ""LS\0 ""RS\0 " @@ -525,6 +525,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/es.h.txt b/radio/src/translations/es.h.txt index b2c6e2048..f2231479c 100644 --- a/radio/src/translations/es.h.txt +++ b/radio/src/translations/es.h.txt @@ -503,6 +503,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/fi.h.txt b/radio/src/translations/fi.h.txt index 8bc6f54a3..ef9c238c0 100644 --- a/radio/src/translations/fi.h.txt +++ b/radio/src/translations/fi.h.txt @@ -489,9 +489,9 @@ #define TR_STICKS_VSRCRAW TR("Rud\0""Ele\0""Thr\0""Ail\0", "\307Rud""\307Ele""\307Thr""\307Ail") #if defined(PCBHORUS) - #define TR_TRIMS_VSRCRAW "\313Rud""\313Ele""\313Thr""\313Ail""\313T5\0""\313T6\0" + #define TR_TRIMS_VSRCRAW "\313Rud""\313Ele""\313Thr""\313Ail""\313T5\0""\313T6\0" #else - #define TR_TRIMS_VSRCRAW TR("TrmR""TrmE""TrmT""TrmA", "\313Rud""\313Ele""\313Thr""\313Ail") + #define TR_TRIMS_VSRCRAW TR("TrmR""TrmE""TrmT""TrmA", "\313Rud""\313Ele""\313Thr""\313Ail") #endif #if defined(PCBHORUS) @@ -503,6 +503,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/fr.h.txt b/radio/src/translations/fr.h.txt index d0a8c472f..9753fda38 100644 --- a/radio/src/translations/fr.h.txt +++ b/radio/src/translations/fr.h.txt @@ -510,6 +510,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/it.h.txt b/radio/src/translations/it.h.txt index 3d312da5e..bd1396484 100644 --- a/radio/src/translations/it.h.txt +++ b/radio/src/translations/it.h.txt @@ -510,6 +510,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/nl.h.txt b/radio/src/translations/nl.h.txt index 51c0dea66..8f5fcbe60 100644 --- a/radio/src/translations/nl.h.txt +++ b/radio/src/translations/nl.h.txt @@ -511,6 +511,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/pl.h.txt b/radio/src/translations/pl.h.txt index a238d1c39..0d9cb0116 100644 --- a/radio/src/translations/pl.h.txt +++ b/radio/src/translations/pl.h.txt @@ -512,6 +512,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\310S4\0""\311LS\0""\311RS\0""\311LS2""\311RS2" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/pt.h.txt b/radio/src/translations/pt.h.txt index 899adbc6f..2353b7ea2 100644 --- a/radio/src/translations/pt.h.txt +++ b/radio/src/translations/pt.h.txt @@ -498,6 +498,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0" diff --git a/radio/src/translations/se.h.txt b/radio/src/translations/se.h.txt index 2d34b1481..a539077d8 100644 --- a/radio/src/translations/se.h.txt +++ b/radio/src/translations/se.h.txt @@ -517,6 +517,9 @@ #elif defined(PCBX9E) #define TR_POTS_VSRCRAW "\310F1\0""\310F2\0""\310F3\0""\310F4\0""\311S1\0""\311S2\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0""\312SI\0""\312SJ\0""\312SK\0""\312SL\0""\312SM\0""\312SN\0""\312SO\0""\312SP\0""\312SQ\0""\312SR\0" +#elif defined(PCBX7D) + #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0" + #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SF\0""\312SH\0" #elif defined(PCBTARANIS) #define TR_POTS_VSRCRAW "\310S1\0""\310S2\0""\310S3\0""\311LS\0""\311RS\0" #define TR_SW_VSRCRAW "\312SA\0""\312SB\0""\312SC\0""\312SD\0""\312SE\0""\312SF\0""\312SG\0""\312SH\0"