mirror of
https://github.com/opentx/opentx.git
synced 2025-07-23 00:05:17 +03:00
[Horus] Fix simu segfault, cosmetics
This commit is contained in:
parent
89e0fd1e1d
commit
e6ac77a789
3 changed files with 12 additions and 8 deletions
|
@ -42,7 +42,7 @@ bool menuRadioVersion(event_t event)
|
||||||
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 3*FH, time_stamp);
|
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 3*FH, time_stamp);
|
||||||
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 4*FH, eeprom_stamp);
|
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 4*FH, eeprom_stamp);
|
||||||
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 5*FH, "UID:");
|
lcdDrawText(MENUS_MARGIN_LEFT, MENU_CONTENT_TOP + 5*FH, "UID:");
|
||||||
lcdDrawText(48, MENU_HEADER_HEIGHT+1+5*FH, reusableBuffer.version.id);
|
lcdDrawText(MENUS_MARGIN_LEFT + 64, MENU_CONTENT_TOP + 5*FH, reusableBuffer.version.id);
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
if (event == EVT_KEY_LONG(KEY_ENTER)) {
|
if (event == EVT_KEY_LONG(KEY_ENTER)) {
|
||||||
|
|
|
@ -41,7 +41,11 @@ void watchdogInit(unsigned int duration)
|
||||||
|
|
||||||
void getCPUUniqueID(char * s)
|
void getCPUUniqueID(char * s)
|
||||||
{
|
{
|
||||||
|
#if defined(SIMU)
|
||||||
|
uint32_t cpu_uid[3] = {0x12345678, 0x55AA55AA, 0x87654321};
|
||||||
|
#else
|
||||||
uint32_t * cpu_uid = (uint32_t *)0x1FFF7A10;
|
uint32_t * cpu_uid = (uint32_t *)0x1FFF7A10;
|
||||||
|
#endif
|
||||||
char * tmp = strAppendUnsigned(s, cpu_uid[0], 8, 16);
|
char * tmp = strAppendUnsigned(s, cpu_uid[0], 8, 16);
|
||||||
*tmp = ' ';
|
*tmp = ' ';
|
||||||
tmp = strAppendUnsigned(tmp+1, cpu_uid[1], 8, 16);
|
tmp = strAppendUnsigned(tmp+1, cpu_uid[1], 8, 16);
|
||||||
|
|
|
@ -31,18 +31,18 @@ extern "C" {
|
||||||
|
|
||||||
void watchdogInit(unsigned int duration)
|
void watchdogInit(unsigned int duration)
|
||||||
{
|
{
|
||||||
IWDG->KR = 0x5555 ; // Unlock registers
|
IWDG->KR = 0x5555; // Unlock registers
|
||||||
IWDG->PR = 3 ; // Divide by 32 => 1kHz clock
|
IWDG->PR = 3; // Divide by 32 => 1kHz clock
|
||||||
IWDG->KR = 0x5555 ; // Unlock registers
|
IWDG->KR = 0x5555; // Unlock registers
|
||||||
IWDG->RLR = duration ; // 1.5 seconds nominal
|
IWDG->RLR = duration; // 1.5 seconds nominal
|
||||||
IWDG->KR = 0xAAAA ; // reload
|
IWDG->KR = 0xAAAA; // reload
|
||||||
IWDG->KR = 0xCCCC ; // start
|
IWDG->KR = 0xCCCC; // start
|
||||||
}
|
}
|
||||||
|
|
||||||
void getCPUUniqueID(char * s)
|
void getCPUUniqueID(char * s)
|
||||||
{
|
{
|
||||||
#if defined(SIMU)
|
#if defined(SIMU)
|
||||||
uint32_t cpu_uid[3] = { 0x12345678, 0x55AA55AA, 0x87654321};
|
uint32_t cpu_uid[3] = {0x12345678, 0x55AA55AA, 0x87654321};
|
||||||
#else
|
#else
|
||||||
uint32_t * cpu_uid = (uint32_t *)0x1FFF7A10;
|
uint32_t * cpu_uid = (uint32_t *)0x1FFF7A10;
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue