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Introduced definition HARDWARE_INTERNAL_MODULE to avoid testing the brand etc.

This commit is contained in:
Bertrand Songis 2019-03-20 17:36:29 +01:00
parent 4b393e48a0
commit f5c6c55ac5
8 changed files with 15 additions and 9 deletions

View file

@ -574,7 +574,7 @@ bool isExternalModuleAvailable(int module)
return false;
}
#endif
#if defined(PCBTARANIS) || defined(PCBHORUS)
#if defined(HARDWARE_INTERNAL_MODULE)
if (module == MODULE_TYPE_R9M && g_model.moduleData[INTERNAL_MODULE].type == MODULE_TYPE_XJT) {
return false;
}

View file

@ -31,14 +31,17 @@ TrainerPulsesData trainerPulsesData __DMA;
uint8_t getModuleType(uint8_t module)
{
uint8_t type = g_model.moduleData[module].type;
#if defined(PCBTARANIS) || defined(PCBHORUS)
#if defined(HARDWARE_INTERNAL_MODULE)
if (module == INTERNAL_MODULE && isInternalModuleAvailable(type)) {
return type;
}
#endif
if (module == EXTERNAL_MODULE && isExternalModuleAvailable(type)) {
return type;
}
return MODULE_TYPE_NONE;
}
@ -334,7 +337,7 @@ void setupPulsesExternalModule(uint8_t protocol)
void setupPulses(uint8_t module, uint8_t protocol)
{
switch (module) {
#if defined(PCBTARANIS) || defined(PCBHORUS)
#if defined(HARDWARE_INTERNAL_MODULE)
case INTERNAL_MODULE:
setupPulsesInternalModule(protocol);
break;

View file

@ -510,6 +510,7 @@
#endif
// Internal Module
#define HARDWARE_INTERNAL_MODULE
#define INTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_DMA2)
#define INTMODULE_PWR_GPIO GPIOA
#define INTMODULE_PWR_GPIO_PIN GPIO_Pin_8 // PA.08

View file

@ -176,8 +176,7 @@ extern "C" void TELEMETRY_DMA_TX_IRQHandler(void)
DMA_ClearITPendingBit(TELEMETRY_DMA_Stream_TX, TELEMETRY_DMA_TX_FLAG_TC);
TELEMETRY_USART->CR1 |= USART_CR1_TCIE;
if (telemetryProtocol == PROTOCOL_TELEMETRY_FRSKY_SPORT) {
outputTelemetryBuffer.size = 0;
outputTelemetryBuffer.trigger = 0x7E;
outputTelemetryBuffer.reset();
}
}
}

View file

@ -9,6 +9,7 @@ set(NAVIGATION_TYPE 9x)
set(TARGET_DIR sky9x)
set(FIRMWARE_DEPENDENCIES ${FIRMWARE_DEPENDENCIES} 9x_bitmaps)
set(PPM_LIMITS_SYMETRICAL YES)
set(PXX1 YES)
if(PCB STREQUAL 9XRPRO)
add_definitions(-Dat91sam3s8 -DREVX)

View file

@ -279,7 +279,7 @@ extern "C" void PWM_IRQHandler(void)
if (reason & PWM_ISR1_CHID3) {
// Use the current protocol, don't switch until set_up_pulses
switch (moduleSettings[EXTERNAL_MODULE].protocol) {
case PROTOCOL_CHANNELS_PXX:
case PROTOCOL_CHANNELS_PXX1_PULSES:
// Alternate periods of 6.5mS and 2.5 mS
period = pwmptr->PWM_CH_NUM[3].PWM_CPDR;
if (period == 2500 * 2) {
@ -365,11 +365,12 @@ extern "C" void PWM_IRQHandler(void)
#if !defined(REVA)
if (reason & PWM_ISR1_CHID1) {
pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = *modulePulsesData[EXTRA_MODULE].ppm.ptr++;
// TODO EXTRA_MODULE will be broken
/*pwmptr->PWM_CH_NUM[1].PWM_CPDRUPD = *modulePulsesData[EXTRA_MODULE].ppm.ptr++;
if (*modulePulsesData[EXTRA_MODULE].ppm.ptr == 0) {
setupPulses(EXTRA_MODULE);
setExtraModulePolarity();
}
}*/
}
#endif
}

View file

@ -669,6 +669,7 @@
#endif
// Internal Module
#define HARDWARE_INTERNAL_MODULE
#if defined(PCBXLITE) || defined(PCBX3)
#define INTMODULE_RCC_APB1Periph RCC_APB1Periph_TIM3
#define INTMODULE_RCC_APB2Periph RCC_APB2Periph_USART1

View file

@ -89,7 +89,7 @@ void sendSynchronousPulses()
{
for (uint8_t module = 0; module < NUM_MODULES; module++) {
if (isModuleSynchronous(module) && setupPulses(module)) {
#if defined(PCBHORUS) || defined(PCBTARANIS)
#if defined(HARDWARE_INTERNAL_MODULE)
if (module == INTERNAL_MODULE)
intmoduleSendNextFrame();
#endif