include: linux: Update kernel headers to version v6.7
Update kernel headers to v6.7 using utils/update-kernel-headers.sh and re-instating libcamera local modifications. The V4L2_SUBDEV_CAP_MPLEXED flag has been renamed to V4L2_SUBDEV_CAP_STREAMS in the upstream streams API. Adapt the code base accordingly. The flag's numerical value hasn't changed, there is no ABI breakage introduced by the API update. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Acked-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
This commit is contained in:
Laurent Pinchart
parent
439cfe7fbd
commit
df770d4b0a
12 changed files with 1536 additions and 147 deletions
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@ -36,7 +36,7 @@ struct V4L2SubdeviceCapability final : v4l2_subdev_capability {
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}
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bool hasStreams() const
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{
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return capabilities & V4L2_SUBDEV_CAP_MPLEXED;
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return capabilities & V4L2_SUBDEV_CAP_STREAMS;
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}
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};
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: CC0-1.0
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Files in this directory are imported from v5.19 of the Linux kernel. Do not
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Files in this directory are imported from v6.7 of the Linux kernel. Do not
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modify them manually.
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@ -85,6 +85,88 @@ struct dma_buf_sync {
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#define DMA_BUF_NAME_LEN 32
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/**
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* struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
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* current set of fences on a dma-buf file descriptor as a sync_file. CPU
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* waits via poll() or other driver-specific mechanisms typically wait on
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* whatever fences are on the dma-buf at the time the wait begins. This
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* is similar except that it takes a snapshot of the current fences on the
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* dma-buf for waiting later instead of waiting immediately. This is
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* useful for modern graphics APIs such as Vulkan which assume an explicit
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* synchronization model but still need to inter-operate with dma-buf.
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*
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* The intended usage pattern is the following:
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*
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* 1. Export a sync_file with flags corresponding to the expected GPU usage
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* via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
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*
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* 2. Submit rendering work which uses the dma-buf. The work should wait on
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* the exported sync file before rendering and produce another sync_file
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* when complete.
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*
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* 3. Import the rendering-complete sync_file into the dma-buf with flags
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* corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
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*
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* Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
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* the above is not a single atomic operation. If userspace wants to ensure
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* ordering via these fences, it is the respnosibility of userspace to use
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* locks or other mechanisms to ensure that no other context adds fences or
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* submits work between steps 1 and 3 above.
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*/
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struct dma_buf_export_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* the returned sync file waits on any writers of the dma-buf to
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* complete. Waiting on the returned sync file is equivalent to
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* poll() with POLLIN.
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*
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* If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
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* any users of the dma-buf (read or write) to complete. Waiting
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* on the returned sync file is equivalent to poll() with POLLOUT.
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* If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
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* is equivalent to just DMA_BUF_SYNC_WRITE.
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*/
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__u32 flags;
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/** @fd: Returned sync file descriptor */
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__s32 fd;
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};
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/**
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* struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
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*
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* Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
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* sync_file into a dma-buf for the purposes of implicit synchronization
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* with other dma-buf consumers. This allows clients using explicitly
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* synchronized APIs such as Vulkan to inter-op with dma-buf consumers
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* which expect implicit synchronization such as OpenGL or most media
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* drivers/video.
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*/
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struct dma_buf_import_sync_file {
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/**
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* @flags: Read/write flags
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*
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* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
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*
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* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
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* this inserts the sync_file as a read-only fence. Any subsequent
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* implicitly synchronized writes to this dma-buf will wait on this
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* fence but reads will not.
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*
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* If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
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* write fence. All subsequent implicitly synchronized access to
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* this dma-buf will wait on this fence.
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*/
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__u32 flags;
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/** @fd: Sync file descriptor */
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__s32 fd;
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};
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#define DMA_BUF_BASE 'b'
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#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
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@ -94,5 +176,7 @@ struct dma_buf_sync {
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#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
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#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
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#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
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#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
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#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
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#endif
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@ -88,6 +88,18 @@ extern "C" {
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*
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* The authoritative list of format modifier codes is found in
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* `include/uapi/drm/drm_fourcc.h`
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*
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* Open Source User Waiver
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* -----------------------
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*
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* Because this is the authoritative source for pixel formats and modifiers
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* referenced by GL, Vulkan extensions and other standards and hence used both
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* by open source and closed source driver stacks, the usual requirement for an
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* upstream in-kernel or open source userspace user does not apply.
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*
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* To ensure, as much as feasible, compatibility across stacks and avoid
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* confusion with incompatible enumerations stakeholders for all relevant driver
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* stacks should approve additions.
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*/
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#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
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@ -99,18 +111,42 @@ extern "C" {
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#define DRM_FORMAT_INVALID 0
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/* color index */
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#define DRM_FORMAT_C1 fourcc_code('C', '1', ' ', ' ') /* [7:0] C0:C1:C2:C3:C4:C5:C6:C7 1:1:1:1:1:1:1:1 eight pixels/byte */
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#define DRM_FORMAT_C2 fourcc_code('C', '2', ' ', ' ') /* [7:0] C0:C1:C2:C3 2:2:2:2 four pixels/byte */
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#define DRM_FORMAT_C4 fourcc_code('C', '4', ' ', ' ') /* [7:0] C0:C1 4:4 two pixels/byte */
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#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
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/* 8 bpp Red */
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/* 1 bpp Darkness (inverse relationship between channel value and brightness) */
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#define DRM_FORMAT_D1 fourcc_code('D', '1', ' ', ' ') /* [7:0] D0:D1:D2:D3:D4:D5:D6:D7 1:1:1:1:1:1:1:1 eight pixels/byte */
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/* 2 bpp Darkness (inverse relationship between channel value and brightness) */
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#define DRM_FORMAT_D2 fourcc_code('D', '2', ' ', ' ') /* [7:0] D0:D1:D2:D3 2:2:2:2 four pixels/byte */
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/* 4 bpp Darkness (inverse relationship between channel value and brightness) */
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#define DRM_FORMAT_D4 fourcc_code('D', '4', ' ', ' ') /* [7:0] D0:D1 4:4 two pixels/byte */
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/* 8 bpp Darkness (inverse relationship between channel value and brightness) */
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#define DRM_FORMAT_D8 fourcc_code('D', '8', ' ', ' ') /* [7:0] D */
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/* 1 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R1 fourcc_code('R', '1', ' ', ' ') /* [7:0] R0:R1:R2:R3:R4:R5:R6:R7 1:1:1:1:1:1:1:1 eight pixels/byte */
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/* 2 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R2 fourcc_code('R', '2', ' ', ' ') /* [7:0] R0:R1:R2:R3 2:2:2:2 four pixels/byte */
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/* 4 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R4 fourcc_code('R', '4', ' ', ' ') /* [7:0] R0:R1 4:4 two pixels/byte */
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/* 8 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
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/* 10 bpp Red */
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/* 10 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
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/* 12 bpp Red */
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/* 12 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R12 fourcc_code('R', '1', '2', ' ') /* [15:0] x:R 4:12 little endian */
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/* 16 bpp Red */
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/* 16 bpp Red (direct relationship between channel value and brightness) */
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#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
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/* 16 bpp RG */
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@ -287,6 +323,8 @@ extern "C" {
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* index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
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*/
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#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */
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#define DRM_FORMAT_NV20 fourcc_code('N', 'V', '2', '0') /* 2x1 subsampled Cr:Cb plane */
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#define DRM_FORMAT_NV30 fourcc_code('N', 'V', '3', '0') /* non-subsampled Cr:Cb plane */
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/*
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* 2 plane YCbCr MSB aligned
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@ -626,7 +664,7 @@ extern "C" {
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*
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* The main surface is Y-tiled and is at plane index 0 whereas CCS is linear
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* and at index 1. The clear color is stored at index 2, and the pitch should
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* be ignored. The clear color structure is 256 bits. The first 128 bits
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* be 64 bytes aligned. The clear color structure is 256 bits. The first 128 bits
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* represents Raw Clear Color Red, Green, Blue and Alpha color each represented
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* by 32 bits. The raw clear color is consumed by the 3d engine and generates
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* the converted clear color of size 64 bits. The first 32 bits store the Lower
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@ -679,13 +717,56 @@ extern "C" {
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* outside of the GEM object in a reserved memory area dedicated for the
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* storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
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* main surface pitch is required to be a multiple of four Tile 4 widths. The
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* clear color is stored at plane index 1 and the pitch should be ignored. The
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* format of the 256 bits of clear color data matches the one used for the
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* I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description
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* clear color is stored at plane index 1 and the pitch should be 64 bytes
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* aligned. The format of the 256 bits of clear color data matches the one used
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* for the I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description
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* for details.
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*/
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#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)
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/*
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* Intel Color Control Surfaces (CCS) for display ver. 14 render compression.
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*
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* The main surface is tile4 and at plane index 0, the CCS is linear and
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* at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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* main surface. In other words, 4 bits in CCS map to a main surface cache
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* line pair. The main surface pitch is required to be a multiple of four
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* tile4 widths.
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*/
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#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS fourcc_mod_code(INTEL, 13)
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/*
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* Intel Color Control Surfaces (CCS) for display ver. 14 media compression
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*
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* The main surface is tile4 and at plane index 0, the CCS is linear and
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* at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
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* main surface. In other words, 4 bits in CCS map to a main surface cache
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* line pair. The main surface pitch is required to be a multiple of four
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* tile4 widths. For semi-planar formats like NV12, CCS planes follow the
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* Y and UV planes i.e., planes 0 and 1 are used for Y and UV surfaces,
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* planes 2 and 3 for the respective CCS.
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*/
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#define I915_FORMAT_MOD_4_TILED_MTL_MC_CCS fourcc_mod_code(INTEL, 14)
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/*
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* Intel Color Control Surface with Clear Color (CCS) for display ver. 14 render
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* compression.
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*
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* The main surface is tile4 and is at plane index 0 whereas CCS is linear
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* and at index 1. The clear color is stored at index 2, and the pitch should
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* be ignored. The clear color structure is 256 bits. The first 128 bits
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* represents Raw Clear Color Red, Green, Blue and Alpha color each represented
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* by 32 bits. The raw clear color is consumed by the 3d engine and generates
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* the converted clear color of size 64 bits. The first 32 bits store the Lower
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* Converted Clear Color value and the next 32 bits store the Higher Converted
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* Clear Color value when applicable. The Converted Clear Color values are
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* consumed by the DE. The last 64 bits are used to store Color Discard Enable
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* and Depth Clear Value Valid which are ignored by the DE. A CCS cache line
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* corresponds to an area of 4x1 tiles in the main surface. The main surface
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* pitch is required to be a multiple of 4 tile widths.
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*/
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#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
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/*
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* IPU3 Bayer packing layout
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*
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@ -795,6 +876,35 @@ extern "C" {
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*/
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#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
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/*
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* Vivante TS (tile-status) buffer modifiers. They can be combined with all of
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* the color buffer tiling modifiers defined above. When TS is present it's a
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* separate buffer containing the clear/compression status of each tile. The
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* modifiers are defined as VIVANTE_MOD_TS_c_s, where c is the color buffer
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* tile size in bytes covered by one entry in the status buffer and s is the
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* number of status bits per entry.
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* We reserve the top 8 bits of the Vivante modifier space for tile status
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* clear/compression modifiers, as future cores might add some more TS layout
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* variations.
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*/
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#define VIVANTE_MOD_TS_64_4 (1ULL << 48)
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#define VIVANTE_MOD_TS_64_2 (2ULL << 48)
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#define VIVANTE_MOD_TS_128_4 (3ULL << 48)
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#define VIVANTE_MOD_TS_256_4 (4ULL << 48)
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#define VIVANTE_MOD_TS_MASK (0xfULL << 48)
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/*
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* Vivante compression modifiers. Those depend on a TS modifier being present
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* as the TS bits get reinterpreted as compression tags instead of simple
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* clear markers when compression is enabled.
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*/
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#define VIVANTE_MOD_COMP_DEC400 (1ULL << 52)
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#define VIVANTE_MOD_COMP_MASK (0xfULL << 52)
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/* Masking out the extension bits will yield the base modifier. */
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#define VIVANTE_MOD_EXT_MASK (VIVANTE_MOD_TS_MASK | \
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VIVANTE_MOD_COMP_MASK)
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/* NVIDIA frame buffer modifiers */
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/*
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@ -1440,6 +1550,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
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#define AMD_FMT_MOD_TILE_VER_GFX9 1
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#define AMD_FMT_MOD_TILE_VER_GFX10 2
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#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
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#define AMD_FMT_MOD_TILE_VER_GFX11 4
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/*
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* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
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@ -1455,6 +1566,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
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#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
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#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
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#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
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#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
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#define AMD_FMT_MOD_DCC_BLOCK_64B 0
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#define AMD_FMT_MOD_DCC_BLOCK_128B 1
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@ -626,8 +626,11 @@ struct ipu3_uapi_stats_3a {
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* @b: white balance gain for B channel.
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* @gb: white balance gain for Gb channel.
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*
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* Precision u3.13, range [0, 8). White balance correction is done by applying
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* a multiplicative gain to each color channels prior to BNR.
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* For BNR parameters WB gain factor for the three channels [Ggr, Ggb, Gb, Gr].
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* Their precision is U3.13 and the range is (0, 8) and the actual gain is
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* Gx + 1, it is typically Gx = 1.
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*
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* Pout = {Pin * (1 + Gx)}.
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*/
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struct ipu3_uapi_bnr_static_config_wb_gains_config {
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__u16 gr;
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@ -34,7 +34,7 @@
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#define MEDIA_BUS_FMT_FIXED 0x0001
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/* RGB - next is 0x101e */
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/* RGB - next is 0x1026 */
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#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
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@ -46,8 +46,12 @@
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#define MEDIA_BUS_FMT_RGB565_2X8_BE 0x1007
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#define MEDIA_BUS_FMT_RGB565_2X8_LE 0x1008
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#define MEDIA_BUS_FMT_RGB666_1X18 0x1009
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#define MEDIA_BUS_FMT_RGB666_2X9_BE 0x1025
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#define MEDIA_BUS_FMT_BGR666_1X18 0x1023
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#define MEDIA_BUS_FMT_RBG888_1X24 0x100e
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#define MEDIA_BUS_FMT_RGB666_1X24_CPADHI 0x1015
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#define MEDIA_BUS_FMT_BGR666_1X24_CPADHI 0x1024
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#define MEDIA_BUS_FMT_RGB565_1X24_CPADHI 0x1022
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#define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG 0x1010
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#define MEDIA_BUS_FMT_BGR888_1X24 0x1013
|
||||
#define MEDIA_BUS_FMT_BGR888_3X8 0x101b
|
||||
|
|
@ -59,13 +63,17 @@
|
|||
#define MEDIA_BUS_FMT_RGB888_3X8_DELTA 0x101d
|
||||
#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011
|
||||
#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012
|
||||
#define MEDIA_BUS_FMT_RGB666_1X30_CPADLO 0x101e
|
||||
#define MEDIA_BUS_FMT_RGB888_1X30_CPADLO 0x101f
|
||||
#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
|
||||
#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f
|
||||
#define MEDIA_BUS_FMT_RGB101010_1X30 0x1018
|
||||
#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x1020
|
||||
#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021
|
||||
#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019
|
||||
#define MEDIA_BUS_FMT_RGB161616_1X48 0x101a
|
||||
|
||||
/* YUV (including grey) - next is 0x202e */
|
||||
/* YUV (including grey) - next is 0x202f */
|
||||
#define MEDIA_BUS_FMT_Y8_1X8 0x2001
|
||||
#define MEDIA_BUS_FMT_UV8_1X8 0x2015
|
||||
#define MEDIA_BUS_FMT_UYVY8_1_5X8 0x2002
|
||||
|
|
@ -88,6 +96,7 @@
|
|||
#define MEDIA_BUS_FMT_YUYV12_2X12 0x201e
|
||||
#define MEDIA_BUS_FMT_YVYU12_2X12 0x201f
|
||||
#define MEDIA_BUS_FMT_Y14_1X14 0x202d
|
||||
#define MEDIA_BUS_FMT_Y16_1X16 0x202e
|
||||
#define MEDIA_BUS_FMT_UYVY8_1X16 0x200f
|
||||
#define MEDIA_BUS_FMT_VYUY8_1X16 0x2010
|
||||
#define MEDIA_BUS_FMT_YUYV8_1X16 0x2011
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@
|
|||
#ifndef __LINUX_MEDIA_H
|
||||
#define __LINUX_MEDIA_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
|
|
@ -141,8 +140,8 @@ struct media_device_info {
|
|||
#define MEDIA_ENT_F_DV_ENCODER (MEDIA_ENT_F_BASE + 0x6002)
|
||||
|
||||
/* Entity flags */
|
||||
#define MEDIA_ENT_FL_DEFAULT (1 << 0)
|
||||
#define MEDIA_ENT_FL_CONNECTOR (1 << 1)
|
||||
#define MEDIA_ENT_FL_DEFAULT (1U << 0)
|
||||
#define MEDIA_ENT_FL_CONNECTOR (1U << 1)
|
||||
|
||||
/* OR with the entity id value to find the next entity */
|
||||
#define MEDIA_ENT_ID_FLAG_NEXT (1U << 31)
|
||||
|
|
@ -204,9 +203,9 @@ struct media_entity_desc {
|
|||
};
|
||||
};
|
||||
|
||||
#define MEDIA_PAD_FL_SINK (1 << 0)
|
||||
#define MEDIA_PAD_FL_SOURCE (1 << 1)
|
||||
#define MEDIA_PAD_FL_MUST_CONNECT (1 << 2)
|
||||
#define MEDIA_PAD_FL_SINK (1U << 0)
|
||||
#define MEDIA_PAD_FL_SOURCE (1U << 1)
|
||||
#define MEDIA_PAD_FL_MUST_CONNECT (1U << 2)
|
||||
|
||||
struct media_pad_desc {
|
||||
__u32 entity; /* entity ID */
|
||||
|
|
@ -215,14 +214,14 @@ struct media_pad_desc {
|
|||
__u32 reserved[2];
|
||||
};
|
||||
|
||||
#define MEDIA_LNK_FL_ENABLED (1 << 0)
|
||||
#define MEDIA_LNK_FL_IMMUTABLE (1 << 1)
|
||||
#define MEDIA_LNK_FL_DYNAMIC (1 << 2)
|
||||
#define MEDIA_LNK_FL_ENABLED (1U << 0)
|
||||
#define MEDIA_LNK_FL_IMMUTABLE (1U << 1)
|
||||
#define MEDIA_LNK_FL_DYNAMIC (1U << 2)
|
||||
|
||||
#define MEDIA_LNK_FL_LINK_TYPE (0xf << 28)
|
||||
# define MEDIA_LNK_FL_DATA_LINK (0 << 28)
|
||||
# define MEDIA_LNK_FL_INTERFACE_LINK (1 << 28)
|
||||
# define MEDIA_LNK_FL_ANCILLARY_LINK (2 << 28)
|
||||
# define MEDIA_LNK_FL_DATA_LINK (0U << 28)
|
||||
# define MEDIA_LNK_FL_INTERFACE_LINK (1U << 28)
|
||||
# define MEDIA_LNK_FL_ANCILLARY_LINK (2U << 28)
|
||||
|
||||
struct media_link_desc {
|
||||
struct media_pad_desc source;
|
||||
|
|
@ -277,7 +276,7 @@ struct media_links_enum {
|
|||
* struct media_device_info.
|
||||
*/
|
||||
#define MEDIA_V2_ENTITY_HAS_FLAGS(media_version) \
|
||||
((media_version) >= ((4 << 16) | (19 << 8) | 0))
|
||||
((media_version) >= ((4U << 16) | (19U << 8) | 0U))
|
||||
|
||||
struct media_v2_entity {
|
||||
__u32 id;
|
||||
|
|
@ -312,7 +311,7 @@ struct media_v2_interface {
|
|||
* struct media_device_info.
|
||||
*/
|
||||
#define MEDIA_V2_PAD_HAS_INDEX(media_version) \
|
||||
((media_version) >= ((4 << 16) | (19 << 8) | 0))
|
||||
((media_version) >= ((4U << 16) | (19U << 8) | 0U))
|
||||
|
||||
struct media_v2_pad {
|
||||
__u32 id;
|
||||
|
|
@ -415,7 +414,7 @@ struct media_v2_topology {
|
|||
#define MEDIA_INTF_T_ALSA_TIMER (MEDIA_INTF_T_ALSA_BASE + 7)
|
||||
|
||||
/* Obsolete symbol for media_version, no longer used in the kernel */
|
||||
#define MEDIA_API_VERSION ((0 << 16) | (1 << 8) | 0)
|
||||
#define MEDIA_API_VERSION ((0U << 16) | (1U << 8) | 0U)
|
||||
|
||||
|
||||
#endif /* __LINUX_MEDIA_H */
|
||||
|
|
|
|||
|
|
@ -10,45 +10,6 @@
|
|||
*
|
||||
* Copyright (C) 2012 Nokia Corporation
|
||||
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* Alternatively you can redistribute this file under the terms of the
|
||||
* BSD license as stated below:
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. The names of its contributors may not be used to endorse or promote
|
||||
* products derived from this software without specific prior written
|
||||
* permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __V4L2_COMMON__
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -3,10 +3,6 @@
|
|||
* Media Bus API header
|
||||
*
|
||||
* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_V4L2_MEDIABUS_H
|
||||
|
|
|
|||
|
|
@ -6,24 +6,12 @@
|
|||
*
|
||||
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
* Sakari Ailus <sakari.ailus@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_V4L2_SUBDEV_H
|
||||
#define __LINUX_V4L2_SUBDEV_H
|
||||
|
||||
#include <linux/const.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/v4l2-common.h>
|
||||
|
|
@ -202,29 +190,14 @@ struct v4l2_subdev_capability {
|
|||
/* The v4l2 sub-device video device node is registered in read-only mode. */
|
||||
#define V4L2_SUBDEV_CAP_RO_SUBDEV 0x00000001
|
||||
|
||||
/* The v4l2 sub-device supports multiplexed streams. */
|
||||
#define V4L2_SUBDEV_CAP_MPLEXED 0x00000002
|
||||
/* The v4l2 sub-device supports routing and multiplexed streams. */
|
||||
#define V4L2_SUBDEV_CAP_STREAMS 0x00000002
|
||||
|
||||
/*
|
||||
* Is the route active? An active route will start when streaming is enabled
|
||||
* on a video node.
|
||||
*/
|
||||
#define V4L2_SUBDEV_ROUTE_FL_ACTIVE _BITUL(0)
|
||||
|
||||
/*
|
||||
* Is the route immutable, i.e. can it be activated and inactivated?
|
||||
* Set by the driver.
|
||||
*/
|
||||
#define V4L2_SUBDEV_ROUTE_FL_IMMUTABLE _BITUL(1)
|
||||
|
||||
/*
|
||||
* Is the route a source endpoint? A source endpoint route refers to a stream
|
||||
* generated internally by the subdevice (usually a sensor), and thus there
|
||||
* is no sink-side endpoint for the route. The sink_pad and sink_stream
|
||||
* fields are unused.
|
||||
* Set by the driver.
|
||||
*/
|
||||
#define V4L2_SUBDEV_ROUTE_FL_SOURCE _BITUL(2)
|
||||
#define V4L2_SUBDEV_ROUTE_FL_ACTIVE (1U << 0)
|
||||
|
||||
/**
|
||||
* struct v4l2_subdev_route - A route inside a subdev
|
||||
|
|
@ -260,6 +233,24 @@ struct v4l2_subdev_routing {
|
|||
__u32 reserved[6];
|
||||
};
|
||||
|
||||
/*
|
||||
* The client is aware of streams. Setting this flag enables the use of 'stream'
|
||||
* fields (referring to the stream number) with various ioctls. If this is not
|
||||
* set (which is the default), the 'stream' fields will be forced to 0 by the
|
||||
* kernel.
|
||||
*/
|
||||
#define V4L2_SUBDEV_CLIENT_CAP_STREAMS (1ULL << 0)
|
||||
|
||||
/**
|
||||
* struct v4l2_subdev_client_capability - Capabilities of the client accessing
|
||||
* the subdev
|
||||
*
|
||||
* @capabilities: A bitmask of V4L2_SUBDEV_CLIENT_CAP_* flags.
|
||||
*/
|
||||
struct v4l2_subdev_client_capability {
|
||||
__u64 capabilities;
|
||||
};
|
||||
|
||||
/* Backwards compatibility define --- to be removed */
|
||||
#define v4l2_subdev_edid v4l2_edid
|
||||
|
||||
|
|
@ -277,6 +268,9 @@ struct v4l2_subdev_routing {
|
|||
#define VIDIOC_SUBDEV_S_SELECTION _IOWR('V', 62, struct v4l2_subdev_selection)
|
||||
#define VIDIOC_SUBDEV_G_ROUTING _IOWR('V', 38, struct v4l2_subdev_routing)
|
||||
#define VIDIOC_SUBDEV_S_ROUTING _IOWR('V', 39, struct v4l2_subdev_routing)
|
||||
#define VIDIOC_SUBDEV_G_CLIENT_CAP _IOR('V', 101, struct v4l2_subdev_client_capability)
|
||||
#define VIDIOC_SUBDEV_S_CLIENT_CAP _IOWR('V', 102, struct v4l2_subdev_client_capability)
|
||||
|
||||
/* The following ioctls are identical to the ioctls in videodev2.h */
|
||||
#define VIDIOC_SUBDEV_G_STD _IOR('V', 23, v4l2_std_id)
|
||||
#define VIDIOC_SUBDEV_S_STD _IOW('V', 24, v4l2_std_id)
|
||||
|
|
|
|||
|
|
@ -243,6 +243,7 @@ enum v4l2_colorspace {
|
|||
|
||||
/* DCI-P3 colorspace, used by cinema projectors */
|
||||
V4L2_COLORSPACE_DCI_P3 = 12,
|
||||
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -474,7 +475,6 @@ struct v4l2_capability {
|
|||
#define V4L2_CAP_META_CAPTURE 0x00800000 /* Is a metadata capture device */
|
||||
|
||||
#define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */
|
||||
#define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */
|
||||
#define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */
|
||||
#define V4L2_CAP_META_OUTPUT 0x08000000 /* Is a metadata output device */
|
||||
|
||||
|
|
@ -549,6 +549,13 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_RGBX32 v4l2_fourcc('X', 'B', '2', '4') /* 32 RGBX-8-8-8-8 */
|
||||
#define V4L2_PIX_FMT_ARGB32 v4l2_fourcc('B', 'A', '2', '4') /* 32 ARGB-8-8-8-8 */
|
||||
#define V4L2_PIX_FMT_XRGB32 v4l2_fourcc('B', 'X', '2', '4') /* 32 XRGB-8-8-8-8 */
|
||||
#define V4L2_PIX_FMT_RGBX1010102 v4l2_fourcc('R', 'X', '3', '0') /* 32 RGBX-10-10-10-2 */
|
||||
#define V4L2_PIX_FMT_RGBA1010102 v4l2_fourcc('R', 'A', '3', '0') /* 32 RGBA-10-10-10-2 */
|
||||
#define V4L2_PIX_FMT_ARGB2101010 v4l2_fourcc('A', 'R', '3', '0') /* 32 ARGB-2-10-10-10 */
|
||||
|
||||
/* RGB formats (6 or 8 bytes per pixel) */
|
||||
#define V4L2_PIX_FMT_BGR48_12 v4l2_fourcc('B', '3', '1', '2') /* 48 BGR 12-bit per component */
|
||||
#define V4L2_PIX_FMT_ABGR64_12 v4l2_fourcc('B', '4', '1', '2') /* 64 BGRA 12-bit per component */
|
||||
|
||||
/* Grey formats */
|
||||
#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */
|
||||
|
|
@ -556,6 +563,7 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_Y6 v4l2_fourcc('Y', '0', '6', ' ') /* 6 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y10 v4l2_fourcc('Y', '1', '0', ' ') /* 10 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y12 v4l2_fourcc('Y', '1', '2', ' ') /* 12 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y012 v4l2_fourcc('Y', '0', '1', '2') /* 12 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y14 v4l2_fourcc('Y', '1', '4', ' ') /* 14 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ') /* 16 Greyscale */
|
||||
#define V4L2_PIX_FMT_Y16_BE v4l2_fourcc_be('Y', '1', '6', ' ') /* 16 Greyscale BE */
|
||||
|
|
@ -590,6 +598,15 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_YUVA32 v4l2_fourcc('Y', 'U', 'V', 'A') /* 32 YUVA-8-8-8-8 */
|
||||
#define V4L2_PIX_FMT_YUVX32 v4l2_fourcc('Y', 'U', 'V', 'X') /* 32 YUVX-8-8-8-8 */
|
||||
#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */
|
||||
#define V4L2_PIX_FMT_YUV48_12 v4l2_fourcc('Y', '3', '1', '2') /* 48 YUV 4:4:4 12-bit per component */
|
||||
|
||||
/*
|
||||
* YCbCr packed format. For each Y2xx format, xx bits of valid data occupy the MSBs
|
||||
* of the 16 bit components, and 16-xx bits of zero padding occupy the LSBs.
|
||||
*/
|
||||
#define V4L2_PIX_FMT_Y210 v4l2_fourcc('Y', '2', '1', '0') /* 32 YUYV 4:2:2 */
|
||||
#define V4L2_PIX_FMT_Y212 v4l2_fourcc('Y', '2', '1', '2') /* 32 YUYV 4:2:2 */
|
||||
#define V4L2_PIX_FMT_Y216 v4l2_fourcc('Y', '2', '1', '6') /* 32 YUYV 4:2:2 */
|
||||
|
||||
/* two planes -- one Y, one Cr + Cb interleaved */
|
||||
#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
|
||||
|
|
@ -598,12 +615,15 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
|
||||
#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
|
||||
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
|
||||
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0') /* 24 Y/CbCr 4:2:0 10-bit per component */
|
||||
#define V4L2_PIX_FMT_P012 v4l2_fourcc('P', '0', '1', '2') /* 24 Y/CbCr 4:2:0 12-bit per component */
|
||||
|
||||
/* two non contiguous planes - one Y, one Cr + Cb interleaved */
|
||||
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6') /* 16 Y/CbCr 4:2:2 */
|
||||
#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1') /* 16 Y/CrCb 4:2:2 */
|
||||
#define V4L2_PIX_FMT_P012M v4l2_fourcc('P', 'M', '1', '2') /* 24 Y/CbCr 4:2:0 12-bit per component */
|
||||
|
||||
/* three planes - Y Cb, Cr */
|
||||
#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */
|
||||
|
|
@ -625,6 +645,10 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_NV12_4L4 v4l2_fourcc('V', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 4x4 tiles */
|
||||
#define V4L2_PIX_FMT_NV12_16L16 v4l2_fourcc('H', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 tiles */
|
||||
#define V4L2_PIX_FMT_NV12_32L32 v4l2_fourcc('S', 'T', '1', '2') /* 12 Y/CbCr 4:2:0 32x32 tiles */
|
||||
#define V4L2_PIX_FMT_NV15_4L4 v4l2_fourcc('V', 'T', '1', '5') /* 15 Y/CbCr 4:2:0 10-bit 4x4 tiles */
|
||||
#define V4L2_PIX_FMT_P010_4L4 v4l2_fourcc('T', '0', '1', '0') /* 12 Y/CbCr 4:2:0 10-bit 4x4 macroblocks */
|
||||
#define V4L2_PIX_FMT_NV12_8L128 v4l2_fourcc('A', 'T', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */
|
||||
#define V4L2_PIX_FMT_NV12_10BE_8L128 v4l2_fourcc_be('A', 'X', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */
|
||||
|
||||
/* Tiled YUV formats, non contiguous planes */
|
||||
#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 tiles */
|
||||
|
|
@ -707,6 +731,11 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T') /* Fast Walsh Hadamard Transform (vicodec) */
|
||||
#define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H') /* Stateless FWHT (vicodec) */
|
||||
#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */
|
||||
#define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5') /* HEVC parsed slices */
|
||||
#define V4L2_PIX_FMT_AV1_FRAME v4l2_fourcc('A', 'V', '1', 'F') /* AV1 parsed frame */
|
||||
#define V4L2_PIX_FMT_SPK v4l2_fourcc('S', 'P', 'K', '0') /* Sorenson Spark */
|
||||
#define V4L2_PIX_FMT_RV30 v4l2_fourcc('R', 'V', '3', '0') /* RealVideo 8 */
|
||||
#define V4L2_PIX_FMT_RV40 v4l2_fourcc('R', 'V', '4', '0') /* RealVideo 9 & 10 */
|
||||
|
||||
/* Vendor-specific formats */
|
||||
#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */
|
||||
|
|
@ -740,11 +769,15 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_Z16 v4l2_fourcc('Z', '1', '6', ' ') /* Depth data 16-bit */
|
||||
#define V4L2_PIX_FMT_MT21C v4l2_fourcc('M', 'T', '2', '1') /* Mediatek compressed block mode */
|
||||
#define V4L2_PIX_FMT_MM21 v4l2_fourcc('M', 'M', '2', '1') /* Mediatek 8-bit block mode, two non-contiguous planes */
|
||||
#define V4L2_PIX_FMT_MT2110T v4l2_fourcc('M', 'T', '2', 'T') /* Mediatek 10-bit block tile mode */
|
||||
#define V4L2_PIX_FMT_MT2110R v4l2_fourcc('M', 'T', '2', 'R') /* Mediatek 10-bit block raster mode */
|
||||
#define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */
|
||||
#define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */
|
||||
#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */
|
||||
#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */
|
||||
#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */
|
||||
#define V4L2_PIX_FMT_AJPG v4l2_fourcc('A', 'J', 'P', 'G') /* Aspeed JPEG */
|
||||
#define V4L2_PIX_FMT_HEXTILE v4l2_fourcc('H', 'X', 'T', 'L') /* Hextile compressed */
|
||||
|
||||
/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */
|
||||
#define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */
|
||||
|
|
@ -1550,7 +1583,8 @@ struct v4l2_bt_timings {
|
|||
((bt)->width + V4L2_DV_BT_BLANKING_WIDTH(bt))
|
||||
#define V4L2_DV_BT_BLANKING_HEIGHT(bt) \
|
||||
((bt)->vfrontporch + (bt)->vsync + (bt)->vbackporch + \
|
||||
(bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch)
|
||||
((bt)->interlaced ? \
|
||||
((bt)->il_vfrontporch + (bt)->il_vsync + (bt)->il_vbackporch) : 0))
|
||||
#define V4L2_DV_BT_FRAME_HEIGHT(bt) \
|
||||
((bt)->height + V4L2_DV_BT_BLANKING_HEIGHT(bt))
|
||||
|
||||
|
|
@ -1641,7 +1675,7 @@ struct v4l2_input {
|
|||
__u8 name[32]; /* Label */
|
||||
__u32 type; /* Type of input */
|
||||
__u32 audioset; /* Associated audios (bitfield) */
|
||||
__u32 tuner; /* enum v4l2_tuner_type */
|
||||
__u32 tuner; /* Tuner index */
|
||||
v4l2_std_id std;
|
||||
__u32 status;
|
||||
__u32 capabilities;
|
||||
|
|
@ -1728,6 +1762,8 @@ struct v4l2_ext_control {
|
|||
__u8 *p_u8;
|
||||
__u16 *p_u16;
|
||||
__u32 *p_u32;
|
||||
__s32 *p_s32;
|
||||
__s64 *p_s64;
|
||||
struct v4l2_area *p_area;
|
||||
struct v4l2_ctrl_h264_sps *p_h264_sps;
|
||||
struct v4l2_ctrl_h264_pps *p_h264_pps;
|
||||
|
|
@ -1742,6 +1778,15 @@ struct v4l2_ext_control {
|
|||
struct v4l2_ctrl_mpeg2_quantisation *p_mpeg2_quantisation;
|
||||
struct v4l2_ctrl_vp9_compressed_hdr *p_vp9_compressed_hdr_probs;
|
||||
struct v4l2_ctrl_vp9_frame *p_vp9_frame;
|
||||
struct v4l2_ctrl_hevc_sps *p_hevc_sps;
|
||||
struct v4l2_ctrl_hevc_pps *p_hevc_pps;
|
||||
struct v4l2_ctrl_hevc_slice_params *p_hevc_slice_params;
|
||||
struct v4l2_ctrl_hevc_scaling_matrix *p_hevc_scaling_matrix;
|
||||
struct v4l2_ctrl_hevc_decode_params *p_hevc_decode_params;
|
||||
struct v4l2_ctrl_av1_sequence *p_av1_sequence;
|
||||
struct v4l2_ctrl_av1_tile_group_entry *p_av1_tile_group_entry;
|
||||
struct v4l2_ctrl_av1_frame *p_av1_frame;
|
||||
struct v4l2_ctrl_av1_film_grain *p_av1_film_grain;
|
||||
void *ptr;
|
||||
};
|
||||
} __attribute__ ((packed));
|
||||
|
|
@ -1805,6 +1850,17 @@ enum v4l2_ctrl_type {
|
|||
|
||||
V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260,
|
||||
V4L2_CTRL_TYPE_VP9_FRAME = 0x0261,
|
||||
|
||||
V4L2_CTRL_TYPE_HEVC_SPS = 0x0270,
|
||||
V4L2_CTRL_TYPE_HEVC_PPS = 0x0271,
|
||||
V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS = 0x0272,
|
||||
V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX = 0x0273,
|
||||
V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS = 0x0274,
|
||||
|
||||
V4L2_CTRL_TYPE_AV1_SEQUENCE = 0x280,
|
||||
V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY = 0x281,
|
||||
V4L2_CTRL_TYPE_AV1_FRAME = 0x282,
|
||||
V4L2_CTRL_TYPE_AV1_FILM_GRAIN = 0x283,
|
||||
};
|
||||
|
||||
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */
|
||||
|
|
@ -1860,6 +1916,7 @@ struct v4l2_querymenu {
|
|||
#define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100
|
||||
#define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE 0x0200
|
||||
#define V4L2_CTRL_FLAG_MODIFY_LAYOUT 0x0400
|
||||
#define V4L2_CTRL_FLAG_DYNAMIC_ARRAY 0x0800
|
||||
|
||||
/* Query flags, to be ORed with the control ID */
|
||||
#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000
|
||||
|
|
@ -2367,6 +2424,7 @@ struct v4l2_event_vsync {
|
|||
#define V4L2_EVENT_CTRL_CH_VALUE (1 << 0)
|
||||
#define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1)
|
||||
#define V4L2_EVENT_CTRL_CH_RANGE (1 << 2)
|
||||
#define V4L2_EVENT_CTRL_CH_DIMENSIONS (1 << 3)
|
||||
|
||||
struct v4l2_event_ctrl {
|
||||
__u32 changes;
|
||||
|
|
@ -2609,5 +2667,10 @@ struct v4l2_create_buffers {
|
|||
/* Deprecated definitions kept for backwards compatibility */
|
||||
#define V4L2_PIX_FMT_HM12 V4L2_PIX_FMT_NV12_16L16
|
||||
#define V4L2_PIX_FMT_SUNXI_TILED_NV12 V4L2_PIX_FMT_NV12_32L32
|
||||
/*
|
||||
* This capability was never implemented, anyone using this cap should drop it
|
||||
* from their code.
|
||||
*/
|
||||
#define V4L2_CAP_ASYNCIO 0x02000000
|
||||
|
||||
#endif /* __LINUX_VIDEODEV2_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue