mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-17 13:25:30 +03:00
[H7] Enable motor
- Initial cut without Dshot - Enable HAL-based DShot (no burst yet) - Burst Dshot First working version - Non-stop PWM refactor - Conditionalize HAL structures inside motorTimerDma_s
This commit is contained in:
parent
1cbff2b9aa
commit
3a7edd1e3a
3 changed files with 454 additions and 0 deletions
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@ -42,6 +42,13 @@ static FAST_RAM_ZERO_INIT pwmStartWriteFn *pwmStartWrite = NULL;
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#endif
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#endif
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#ifdef USE_DSHOT
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#ifdef USE_DSHOT
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#ifdef STM32H7
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// XXX dshotDmaBuffer can be embedded inside dshotBurstDmaBuffer
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DMA_RAM uint32_t dshotDmaBuffer[MAX_SUPPORTED_MOTORS][DSHOT_DMA_BUFFER_SIZE];
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#ifdef USE_DSHOT_DMAR
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DMA_RAM uint32_t dshotBurstDmaBuffer[MAX_DMA_TIMERS][DSHOT_DMA_BUFFER_SIZE * 4];
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#endif
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#endif
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FAST_RAM_ZERO_INIT loadDmaBufferFn *loadDmaBuffer;
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FAST_RAM_ZERO_INIT loadDmaBufferFn *loadDmaBuffer;
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#define DSHOT_INITIAL_DELAY_US 10000
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#define DSHOT_INITIAL_DELAY_US 10000
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#define DSHOT_COMMAND_DELAY_US 1000
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#define DSHOT_COMMAND_DELAY_US 1000
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@ -125,13 +125,21 @@ typedef enum {
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typedef struct {
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typedef struct {
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TIM_TypeDef *timer;
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TIM_TypeDef *timer;
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#if defined(USE_DSHOT) && defined(USE_DSHOT_DMAR)
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#if defined(USE_DSHOT) && defined(USE_DSHOT_DMAR)
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#if defined(STM32F7) || defined(STM32H7)
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TIM_HandleTypeDef timHandle;
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DMA_HandleTypeDef hdma_tim;
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#endif
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#ifdef STM32F3
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#ifdef STM32F3
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DMA_Channel_TypeDef *dmaBurstRef;
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DMA_Channel_TypeDef *dmaBurstRef;
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#else
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#else
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DMA_Stream_TypeDef *dmaBurstRef;
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DMA_Stream_TypeDef *dmaBurstRef;
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#endif
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#endif
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uint16_t dmaBurstLength;
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uint16_t dmaBurstLength;
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#ifdef STM32H7
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uint32_t *dmaBurstBuffer;
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#else
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uint32_t dmaBurstBuffer[DSHOT_DMA_BUFFER_SIZE * 4];
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uint32_t dmaBurstBuffer[DSHOT_DMA_BUFFER_SIZE * 4];
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#endif
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timeUs_t inputDirectionStampUs;
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timeUs_t inputDirectionStampUs;
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#endif
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#endif
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uint16_t timerDmaSources;
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uint16_t timerDmaSources;
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@ -143,7 +151,12 @@ typedef struct {
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uint16_t value;
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uint16_t value;
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#ifdef USE_DSHOT
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#ifdef USE_DSHOT
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uint16_t timerDmaSource;
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uint16_t timerDmaSource;
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uint8_t timerDmaIndex;
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bool configured;
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bool configured;
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#ifdef STM32H7
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TIM_HandleTypeDef TimHandle;
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DMA_HandleTypeDef hdma_tim;
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#endif
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uint8_t output;
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uint8_t output;
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uint8_t index;
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uint8_t index;
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#ifdef USE_DSHOT_TELEMETRY
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#ifdef USE_DSHOT_TELEMETRY
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@ -178,6 +191,8 @@ typedef struct {
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#else
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#else
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#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
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#if defined(STM32F3) || defined(STM32F4) || defined(STM32F7)
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uint32_t dmaBuffer[DSHOT_DMA_BUFFER_SIZE];
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uint32_t dmaBuffer[DSHOT_DMA_BUFFER_SIZE];
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#elif defined(STM32H7)
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uint32_t *dmaBuffer;
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#else
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#else
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uint8_t dmaBuffer[DSHOT_DMA_BUFFER_SIZE];
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uint8_t dmaBuffer[DSHOT_DMA_BUFFER_SIZE];
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#endif
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#endif
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@ -242,6 +257,13 @@ typedef uint8_t loadDmaBufferFn(uint32_t *dmaBuffer, int stride, uint16_t packet
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uint16_t prepareDshotPacket(motorDmaOutput_t *const motor);
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uint16_t prepareDshotPacket(motorDmaOutput_t *const motor);
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#ifdef STM32H7
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extern DMA_RAM uint32_t dshotDmaBuffer[MAX_SUPPORTED_MOTORS][DSHOT_DMA_BUFFER_SIZE];
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#ifdef USE_DSHOT_DMAR
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extern DMA_RAM uint32_t dshotBurstDmaBuffer[MAX_DMA_TIMERS][DSHOT_DMA_BUFFER_SIZE * 4];
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#endif
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#endif
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extern loadDmaBufferFn *loadDmaBuffer;
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extern loadDmaBufferFn *loadDmaBuffer;
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uint32_t getDshotHz(motorPwmProtocolTypes_e pwmProtocolType);
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uint32_t getDshotHz(motorPwmProtocolTypes_e pwmProtocolType);
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425
src/main/drivers/pwm_output_dshot_hal_hal.c
Normal file
425
src/main/drivers/pwm_output_dshot_hal_hal.c
Normal file
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@ -0,0 +1,425 @@
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <math.h>
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#include <string.h>
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#include "platform.h"
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#ifdef USE_DSHOT
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#include "drivers/io.h"
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#include "timer.h"
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#include "pwm_output.h"
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#include "drivers/nvic.h"
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#include "dma.h"
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#include "rcc.h"
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static HAL_StatusTypeDef result;
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static uint8_t dmaMotorTimerCount = 0;
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static motorDmaTimer_t dmaMotorTimers[MAX_DMA_TIMERS];
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static motorDmaOutput_t dmaMotors[MAX_SUPPORTED_MOTORS];
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motorDmaOutput_t *getMotorDmaOutput(uint8_t index)
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{
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return &dmaMotors[index];
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}
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uint8_t getTimerIndex(TIM_TypeDef *timer)
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{
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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if (dmaMotorTimers[i].timer == timer) {
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return i;
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}
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}
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dmaMotorTimers[dmaMotorTimerCount++].timer = timer;
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return dmaMotorTimerCount - 1;
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}
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// TIM_CHANNEL_x TIM_CHANNEL_x/4 TIM_DMA_ID_CCx TIM_DMA_CCx
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// 0x0 0 1 0x0200
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// 0x4 1 2 0x0400
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// 0x8 2 3 0x0800
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// 0xC 3 4 0x1000
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//
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// TIM_CHANNEL_TO_TIM_DMA_ID_CC = (TIM_CHANNEL_x / 4) + 1
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// TIM_CHANNEL_TO_TIM_DMA_CC = 0x200 << (TIM_CHANNEL_x / 4)
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// pwmChannelDMAStart
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// A variant of HAL_TIM_PWM_Start_DMA/HAL_TIMEx_PWMN_Start_DMA that only disables DMA on a timer channel:
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// 1. Configure and enable DMA Stream
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// 2. Enable DMA request on a timer channel
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void pwmChannelDMAStart(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
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{
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switch (Channel) {
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case TIM_CHANNEL_1:
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HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
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__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
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break;
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case TIM_CHANNEL_2:
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HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
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__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
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break;
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case TIM_CHANNEL_3:
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HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
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__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
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break;
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case TIM_CHANNEL_4:
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HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
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__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
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break;
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}
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}
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// pwmChannelDMAStop
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// A variant of HAL_TIM_PWM_Stop_DMA/HAL_TIMEx_PWMN_Stop_DMA that only disables DMA on a timer channel
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// 1. Disable the TIM Capture/Compare 1 DMA request
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void pwmChannelDMAStop(TIM_HandleTypeDef *htim, uint32_t Channel)
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{
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switch (Channel) {
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case TIM_CHANNEL_1:
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__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
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break;
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case TIM_CHANNEL_2:
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__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
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break;
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case TIM_CHANNEL_3:
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__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
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break;
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case TIM_CHANNEL_4:
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__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
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break;
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}
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}
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// pwmBurstDMAStart
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// A variant of HAL_TIM_DMABurst_WriteStart that can handle multiple bursts.
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// (HAL_TIM_DMABurst_WriteStart can only handle single burst)
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void pwmBurstDMAStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t BurstUnit, uint32_t* BurstBuffer, uint32_t BurstLength)
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{
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// Setup DMA stream
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HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, BurstLength);
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// Configure burst mode DMA */
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htim->Instance->DCR = BurstBaseAddress | BurstUnit;
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// Enable burst mode DMA
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__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
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}
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void pwmWriteDshotInt(uint8_t index, uint16_t value)
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{
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motorDmaOutput_t *const motor = &dmaMotors[index];
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if (!motor->configured) {
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return;
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}
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/*If there is a command ready to go overwrite the value and send that instead*/
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if (pwmDshotCommandIsProcessing()) {
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value = pwmGetDshotCommand(index);
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if (value) {
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motor->requestTelemetry = true;
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}
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}
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if (!motor->timerHardware || !motor->timerHardware->dmaRef) {
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return;
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}
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motor->value = value;
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uint16_t packet = prepareDshotPacket(motor);
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uint8_t bufferSize;
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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bufferSize = loadDmaBuffer(&motor->timer->dmaBurstBuffer[timerLookupChannelIndex(motor->timerHardware->channel)], 4, packet);
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motor->timer->dmaBurstLength = bufferSize * 4;
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} else
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#endif
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{
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bufferSize = loadDmaBuffer(motor->dmaBuffer, 1, packet);
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pwmChannelDMAStart(&motor->TimHandle, motor->timerHardware->channel, motor->dmaBuffer, bufferSize);
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}
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}
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void pwmCompleteDshotMotorUpdate(uint8_t motorCount)
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{
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UNUSED(motorCount);
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// If there is a dshot command loaded up, time it correctly with motor update
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if (pwmDshotCommandIsQueued()) {
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if (!pwmDshotCommandOutputIsEnabled(motorCount)) {
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return;
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}
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}
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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motorDmaTimer_t *burstDmaTimer = &dmaMotorTimers[i];
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// Transfer CCR1 through CCR4 for each burst
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pwmBurstDMAStart(&burstDmaTimer->timHandle,
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TIM_DMABASE_CCR1, TIM_DMA_UPDATE, TIM_DMABURSTLENGTH_4TRANSFERS,
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(uint32_t*)burstDmaTimer->dmaBurstBuffer, burstDmaTimer->dmaBurstLength);
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}
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} else
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#endif
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{
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// XXX Empty for non-burst?
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}
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}
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static void motor_DMA_IRQHandler(dmaChannelDescriptor_t* descriptor)
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{
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if (DMA_GET_FLAG_STATUS(descriptor, DMA_IT_TCIF)) {
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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motorDmaTimer_t *burstDmaTimer = &dmaMotorTimers[descriptor->userParam];
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HAL_TIM_DMABurst_WriteStop(&burstDmaTimer->timHandle, TIM_DMA_UPDATE);
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HAL_DMA_IRQHandler(&burstDmaTimer->hdma_tim);
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} else
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#endif
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{
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motorDmaOutput_t * const motor = &dmaMotors[descriptor->userParam];
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pwmChannelDMAStop(&motor->TimHandle,motor->timerHardware->channel);
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HAL_DMA_IRQHandler(motor->TimHandle.hdma[motor->timerDmaIndex]);
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}
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DMA_CLEAR_FLAG(descriptor, DMA_IT_TCIF);
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}
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}
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void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType, uint8_t output)
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{
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DMA_Stream_TypeDef *dmaRef;
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#ifdef USE_DSHOT_DMAR
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if (useBurstDshot) {
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dmaRef = timerHardware->dmaTimUPRef;
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} else
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#endif
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{
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dmaRef = timerHardware->dmaRef;
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}
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if (dmaRef == NULL) {
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return;
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}
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motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
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motor->timerHardware = timerHardware;
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TIM_TypeDef *timer = timerHardware->tim; // "timer" is confusing; "tim"?
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const IO_t motorIO = IOGetByTag(timerHardware->tag);
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const uint8_t timerIndex = getTimerIndex(timer);
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const bool configureTimer = (timerIndex == dmaMotorTimerCount - 1);
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IOInit(motorIO, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
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IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN), timerHardware->alternateFunction);
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// Configure time base
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if (configureTimer) {
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RCC_ClockCmd(timerRCC(timer), ENABLE);
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motor->TimHandle.Instance = timerHardware->tim; // timer
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motor->TimHandle.Init.Prescaler = (uint16_t)(lrintf((float) timerClock(timer) / getDshotHz(pwmProtocolType) + 0.01f) - 1);
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motor->TimHandle.Init.Period = pwmProtocolType == PWM_TYPE_PROSHOT1000 ? MOTOR_NIBBLE_LENGTH_PROSHOT : MOTOR_BITLENGTH;
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motor->TimHandle.Init.RepetitionCounter = 0;
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||||||
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motor->TimHandle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||||
|
motor->TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
motor->TimHandle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||||
|
|
||||||
|
result = HAL_TIM_PWM_Init(&motor->TimHandle);
|
||||||
|
|
||||||
|
if (result != HAL_OK) {
|
||||||
|
/* Initialization Error */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
From LL version
|
||||||
|
chan oinv IDLE NIDLE POL NPOL
|
||||||
|
N I - Low - Low
|
||||||
|
N - - Low - High
|
||||||
|
P I High - Low -
|
||||||
|
P - High - High -
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* PWM mode 1 configuration */
|
||||||
|
|
||||||
|
TIM_OC_InitTypeDef TIM_OCInitStructure;
|
||||||
|
TIM_OCInitStructure.OCMode = TIM_OCMODE_PWM1;
|
||||||
|
|
||||||
|
if (output & TIMER_OUTPUT_N_CHANNEL) {
|
||||||
|
TIM_OCInitStructure.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||||
|
TIM_OCInitStructure.OCPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCPOLARITY_HIGH : TIM_OCPOLARITY_LOW;
|
||||||
|
TIM_OCInitStructure.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||||
|
TIM_OCInitStructure.OCNPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCNPOLARITY_HIGH : TIM_OCNPOLARITY_LOW;
|
||||||
|
} else {
|
||||||
|
TIM_OCInitStructure.OCIdleState = TIM_OCIDLESTATE_SET;
|
||||||
|
TIM_OCInitStructure.OCPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCPOLARITY_LOW : TIM_OCPOLARITY_HIGH;
|
||||||
|
TIM_OCInitStructure.OCNIdleState = TIM_OCNIDLESTATE_SET;
|
||||||
|
TIM_OCInitStructure.OCNPolarity = (output & TIMER_OUTPUT_INVERTED) ? TIM_OCNPOLARITY_LOW : TIM_OCNPOLARITY_HIGH;
|
||||||
|
}
|
||||||
|
TIM_OCInitStructure.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
|
TIM_OCInitStructure.Pulse = 0;
|
||||||
|
|
||||||
|
result = HAL_TIM_PWM_ConfigChannel(&motor->TimHandle, &TIM_OCInitStructure, motor->timerHardware->channel);
|
||||||
|
|
||||||
|
if (result != HAL_OK) {
|
||||||
|
/* Configuration Error */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
// DMA setup
|
||||||
|
|
||||||
|
motor->timer = &dmaMotorTimers[timerIndex];
|
||||||
|
|
||||||
|
#ifdef USE_DSHOT_DMAR
|
||||||
|
if (useBurstDshot) {
|
||||||
|
motor->timer->dmaBurstRef = dmaRef;
|
||||||
|
|
||||||
|
if (!configureTimer) {
|
||||||
|
motor->configured = true;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
} else
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
motor->timerDmaSource = timerDmaSource(timerHardware->channel);
|
||||||
|
motor->timer->timerDmaSources |= motor->timerDmaSource;
|
||||||
|
motor->timerDmaIndex = timerDmaIndex(timerHardware->channel);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef USE_DSHOT_DMAR
|
||||||
|
if (useBurstDshot) {
|
||||||
|
motor->timer->hdma_tim.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
motor->timer->hdma_tim.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
motor->timer->hdma_tim.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
motor->timer->hdma_tim.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD ;
|
||||||
|
motor->timer->hdma_tim.Init.MemDataAlignment = DMA_MDATAALIGN_WORD ;
|
||||||
|
motor->timer->hdma_tim.Init.Mode = DMA_NORMAL;
|
||||||
|
motor->timer->hdma_tim.Init.Priority = DMA_PRIORITY_HIGH;
|
||||||
|
motor->timer->hdma_tim.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
motor->timer->hdma_tim.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||||
|
motor->timer->hdma_tim.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||||
|
motor->timer->hdma_tim.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||||
|
|
||||||
|
motor->timer->dmaBurstBuffer = &dshotBurstDmaBuffer[timerIndex][0];
|
||||||
|
motor->timer->timHandle = motor->TimHandle;
|
||||||
|
memset(motor->timer->dmaBurstBuffer, 0, DSHOT_DMA_BUFFER_SIZE * 4 * sizeof(uint32_t));
|
||||||
|
|
||||||
|
/* Set hdma_tim instance */
|
||||||
|
motor->timer->hdma_tim.Instance = timerHardware->dmaTimUPRef;
|
||||||
|
motor->timer->hdma_tim.Init.Request = timerHardware->dmaTimUPRequest;
|
||||||
|
|
||||||
|
/* Link hdma_tim to hdma[TIM_DMA_ID_UPDATE] (update) */
|
||||||
|
__HAL_LINKDMA(&motor->timer->timHandle, hdma[TIM_DMA_ID_UPDATE], motor->timer->hdma_tim);
|
||||||
|
|
||||||
|
/* Initialize TIMx DMA handle */
|
||||||
|
result = HAL_DMA_Init(motor->timer->timHandle.hdma[TIM_DMA_ID_UPDATE]);
|
||||||
|
|
||||||
|
} else
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
motor->hdma_tim.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
motor->hdma_tim.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
motor->hdma_tim.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
motor->hdma_tim.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD ;
|
||||||
|
motor->hdma_tim.Init.MemDataAlignment = DMA_MDATAALIGN_WORD ;
|
||||||
|
motor->hdma_tim.Init.Mode = DMA_NORMAL;
|
||||||
|
motor->hdma_tim.Init.Priority = DMA_PRIORITY_HIGH;
|
||||||
|
motor->hdma_tim.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
motor->hdma_tim.Init.PeriphBurst = DMA_PBURST_SINGLE;
|
||||||
|
motor->hdma_tim.Init.MemBurst = DMA_MBURST_SINGLE;
|
||||||
|
motor->hdma_tim.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
||||||
|
|
||||||
|
motor->dmaBuffer = &dshotDmaBuffer[motorIndex][0];
|
||||||
|
motor->dmaBuffer[DSHOT_DMA_BUFFER_SIZE-2] = 0; // XXX Is this necessary? -> probably.
|
||||||
|
motor->dmaBuffer[DSHOT_DMA_BUFFER_SIZE-1] = 0; // XXX Is this necessary?
|
||||||
|
|
||||||
|
motor->hdma_tim.Instance = timerHardware->dmaRef;
|
||||||
|
motor->hdma_tim.Init.Request = timerHardware->dmaRequest;
|
||||||
|
|
||||||
|
/* Link hdma_tim to hdma[x] (channelx) */
|
||||||
|
__HAL_LINKDMA(&motor->TimHandle, hdma[motor->timerDmaIndex], motor->hdma_tim);
|
||||||
|
|
||||||
|
/* Initialize TIMx DMA handle */
|
||||||
|
result = HAL_DMA_Init(motor->TimHandle.hdma[motor->timerDmaIndex]);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
if (result != HAL_OK) {
|
||||||
|
/* Initialization Error */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef USE_DSHOT_DMAR
|
||||||
|
if (useBurstDshot) {
|
||||||
|
dmaInit(timerHardware->dmaTimUPIrqHandler, OWNER_TIMUP, timerGetTIMNumber(timerHardware->tim));
|
||||||
|
dmaSetHandler(timerHardware->dmaTimUPIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), timerIndex);
|
||||||
|
} else
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
|
||||||
|
dmaSetHandler(timerHardware->dmaIrqHandler, motor_DMA_IRQHandler, NVIC_BUILD_PRIORITY(1, 2), motorIndex);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Start the timer channel now.
|
||||||
|
// Enabling/disabling DMA request can restart a new cycle without PWM start/stop.
|
||||||
|
|
||||||
|
if (motor->timerHardware->output & TIMER_OUTPUT_N_CHANNEL) {
|
||||||
|
result = HAL_TIMEx_PWMN_Start(&motor->TimHandle, motor->timerHardware->channel);
|
||||||
|
} else {
|
||||||
|
result = HAL_TIM_PWM_Start(&motor->TimHandle, motor->timerHardware->channel);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (result != HAL_OK) {
|
||||||
|
/* Starting PWM generation Error */
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
motor->configured = true;
|
||||||
|
}
|
||||||
|
#endif
|
Loading…
Add table
Add a link
Reference in a new issue