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Using SPI default pins (#12367)

This commit is contained in:
J Blackman 2023-02-16 08:25:39 +11:00 committed by GitHub
parent 3faf844010
commit 9e36ba6ec4
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
3 changed files with 73 additions and 81 deletions

View file

@ -69,3 +69,41 @@ typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
#define DMA_RAM_RW
#define USE_LATE_TASK_STATISTICS
/*
#ifndef SPI1_SCK_PIN
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#endif
#ifndef SPI2_SCK_PIN
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#endif
#ifndef SPI3_SCK_PIN
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#endif
#ifndef SPI4_SCK_PIN
#define SPI4_SCK_PIN NONE
#define SPI4_MISO_PIN NONE
#define SPI4_MOSI_PIN NONE
#endif
#ifndef SPI5_SCK_PIN
#define SPI5_SCK_PIN NONE
#define SPI5_MISO_PIN NONE
#define SPI5_MOSI_PIN NONE
#endif
#ifndef SPI6_SCK_PIN
#define SPI6_SCK_PIN NONE
#define SPI6_MISO_PIN NONE
#define SPI6_MOSI_PIN NONE
#endif
*/

View file

@ -303,3 +303,38 @@ extern uint8_t _dmaram_end__;
#endif
#endif // STM32F7
#ifndef SPI1_SCK_PIN
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#endif
#ifndef SPI2_SCK_PIN
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#endif
#ifndef SPI3_SCK_PIN
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#endif
#ifndef SPI4_SCK_PIN
#define SPI4_SCK_PIN NONE
#define SPI4_MISO_PIN NONE
#define SPI4_MOSI_PIN NONE
#endif
#ifndef SPI5_SCK_PIN
#define SPI5_SCK_PIN NONE
#define SPI5_MISO_PIN NONE
#define SPI5_MOSI_PIN NONE
#endif
#ifndef SPI6_SCK_PIN
#define SPI6_SCK_PIN NONE
#define SPI6_MISO_PIN NONE
#define SPI6_MOSI_PIN NONE
#endif

View file

@ -89,87 +89,6 @@
#define I2C4_PULLUP false
#endif
// pg/bus_spi
#ifdef SPI_FULL_RECONFIGURABILITY
#ifdef USE_SPI_DEVICE_1
#define SPI1_SCK_PIN NONE
#define SPI1_MISO_PIN NONE
#define SPI1_MOSI_PIN NONE
#endif
#ifdef USE_SPI_DEVICE_2
#define SPI2_SCK_PIN NONE
#define SPI2_MISO_PIN NONE
#define SPI2_MOSI_PIN NONE
#endif
#ifdef USE_SPI_DEVICE_3
#define SPI3_SCK_PIN NONE
#define SPI3_MISO_PIN NONE
#define SPI3_MOSI_PIN NONE
#endif
#ifdef USE_SPI_DEVICE_4
#define SPI4_SCK_PIN NONE
#define SPI4_MISO_PIN NONE
#define SPI4_MOSI_PIN NONE
#endif
#ifdef USE_SPI_DEVICE_5
#define SPI5_SCK_PIN NONE
#define SPI5_MISO_PIN NONE
#define SPI5_MOSI_PIN NONE
#endif
#ifdef USE_SPI_DEVICE_6
#define SPI6_SCK_PIN NONE
#define SPI6_MISO_PIN NONE
#define SPI6_MOSI_PIN NONE
#endif
#else
// Pin defaults for backward compatibility
#ifndef SPI1_SCK_PIN
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#endif
#ifndef SPI2_SCK_PIN
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#endif
#ifndef SPI3_SCK_PIN
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#endif
#ifndef SPI4_SCK_PIN
#define SPI4_SCK_PIN NONE
#define SPI4_MISO_PIN NONE
#define SPI4_MOSI_PIN NONE
#endif
#ifndef SPI5_SCK_PIN
#define SPI5_SCK_PIN NONE
#define SPI5_MISO_PIN NONE
#define SPI5_MOSI_PIN NONE
#endif
#ifndef SPI6_SCK_PIN
#define SPI6_SCK_PIN NONE
#define SPI6_MISO_PIN NONE
#define SPI6_MOSI_PIN NONE
#endif
#endif
// Extracted from rx/rx.c and rx/rx.h
#define RX_MAPPABLE_CHANNEL_COUNT 8