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ELRS/SX127x - Cleanup NVIC/atomic block usage.

Since #11380 the sx127xISR will always be called from an ISR handler so
no additional NVIC entry or ATOMIC_BLOCK is required.

Also, since sx127xISR is always called from an ISR handler it means that
there's no need to call rxSpiPollExti.
This commit is contained in:
Dominic Clifton 2022-03-07 15:28:53 +01:00
parent 70a1b59687
commit d43cb26b8e

View file

@ -76,19 +76,10 @@ static bool sx127xDetectChip(void)
uint8_t sx127xISR(timeUs_t *timeStamp)
{
bool extiTriggered = false;
timeUs_t extiTimestamp;
timeUs_t extiTimestamp = rxSpiGetLastExtiTimeUs();
ATOMIC_BLOCK(NVIC_PRIO_RX_SPI_INT_EXTI) {
// prevent a data-race that can occur if a new EXTI ISR occurs during this block.
extiTriggered = rxSpiPollExti();
extiTimestamp = rxSpiGetLastExtiTimeUs();
if (extiTriggered) {
rxSpiResetExti();
}
}
if (extiTriggered) {
uint8_t irqReason = sx127xGetIrqReason();
if (extiTimestamp) {
*timeStamp = extiTimestamp;
@ -96,8 +87,6 @@ uint8_t sx127xISR(timeUs_t *timeStamp)
return irqReason;
}
return 0;
}
bool sx127xInit(IO_t resetPin, IO_t busyPin)
{