mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-14 20:10:18 +03:00
Removed need to specify timer peripherals in the target.h files. Now present in the MCU timer specific files.
This commit is contained in:
parent
adb38caac8
commit
dbb5386f1b
34 changed files with 138 additions and 155 deletions
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@ -27,6 +27,8 @@
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#include "nvic.h"
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#include "gpio.h"
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#include "gpio.h"
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#include "rcc.h"
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#include "system.h"
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#include "timer.h"
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@ -141,6 +143,16 @@ static inline uint8_t lookupChannelIndex(const uint16_t channel)
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return channel >> 2;
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}
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rccPeriphTag_t timerRCC(TIM_TypeDef *tim)
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{
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for (uint8_t i = 0; i < HARDWARE_TIMER_DEFINITION_COUNT; i++) {
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if (timerDefinitions[i].TIMx == tim) {
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return timerDefinitions[i].rcc;
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}
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}
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return 0;
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}
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void timerNVICConfigure(uint8_t irq)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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@ -197,17 +209,14 @@ void timerConfigure(const timerHardware_t *timerHardwarePtr, uint16_t period, ui
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timerNVICConfigure(TIM1_UP_IRQn);
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break;
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#endif
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#if defined (STM32F40_41xxx)
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#if defined (STM32F40_41xxx) || defined(STM32F411xE)
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case TIM1_CC_IRQn:
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timerNVICConfigure(TIM1_UP_TIM10_IRQn);
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break;
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case TIM8_CC_IRQn:
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timerNVICConfigure(TIM8_UP_TIM13_IRQn);
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break;
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#endif
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#if defined (STM32F411xE)
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case TIM1_CC_IRQn:
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timerNVICConfigure(TIM1_UP_TIM10_IRQn);
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#if defined (STM32F40_41xxx)
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case TIM8_CC_IRQn:
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timerNVICConfigure(TIM8_UP_TIM13_IRQn);
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break;
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#endif
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#ifdef STM32F303xC
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@ -640,17 +649,10 @@ void timerInit(void)
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GPIO_PinRemapConfig(GPIO_PartialRemap_TIM3, ENABLE);
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#endif
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#ifdef TIMER_APB1_PERIPHERALS
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RCC_APB1PeriphClockCmd(TIMER_APB1_PERIPHERALS, ENABLE);
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#endif
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#ifdef TIMER_APB2_PERIPHERALS
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RCC_APB2PeriphClockCmd(TIMER_APB2_PERIPHERALS, ENABLE);
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#endif
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#ifdef TIMER_AHB_PERIPHERALS
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RCC_AHBPeriphClockCmd(TIMER_AHB_PERIPHERALS, ENABLE);
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#endif
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/* enable the timer peripherals */
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for (uint8_t i = 0; i < USABLE_TIMER_CHANNEL_COUNT; i++) {
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RCC_ClockCmd(timerRCC(timerHardware[i].tim), ENABLE);
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}
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#if defined(STM32F3) || defined(STM32F4)
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for (uint8_t timerIndex = 0; timerIndex < USABLE_TIMER_CHANNEL_COUNT; timerIndex++) {
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@ -18,6 +18,7 @@
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#pragma once
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#include "io.h"
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#include "rcc.h"
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#if !defined(USABLE_TIMER_CHANNEL_COUNT)
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#define USABLE_TIMER_CHANNEL_COUNT 14
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@ -64,6 +65,11 @@ typedef struct timerOvrHandlerRec_s {
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struct timerOvrHandlerRec_s* next;
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} timerOvrHandlerRec_t;
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typedef struct timerDef_s {
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TIM_TypeDef *TIMx;
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rccPeriphTag_t rcc;
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} timerDef_t;
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typedef struct {
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TIM_TypeDef *tim;
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ioTag_t pin;
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@ -77,7 +83,21 @@ typedef struct {
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uint8_t outputInverted;
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} timerHardware_t;
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#ifdef STM32F1
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#if defined(STM32F10X_XL) || defined(STM32F10X_HD_VL)
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#define HARDWARE_TIMER_DEFINITION_COUNT 14
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#elif defined(STM32F10X_HD) || defined(STM32F10X_CL)
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#define HARDWARE_TIMER_DEFINITION_COUNT 7
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#else
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#define HARDWARE_TIMER_DEFINITION_COUNT 4
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#endif
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#elif defined(STM32F3)
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#define HARDWARE_TIMER_DEFINITION_COUNT 10
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#elif defined(STM32F4)
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#define HARDWARE_TIMER_DEFINITION_COUNT 14
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#endif
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extern const timerHardware_t timerHardware[];
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extern const timerDef_t timerDefinitions[];
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typedef enum {
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TYPE_FREE,
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@ -124,3 +144,4 @@ void timerForceOverflow(TIM_TypeDef *tim);
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void configTimeBase(TIM_TypeDef *tim, uint16_t period, uint8_t mhz); // TODO - just for migration
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rccPeriphTag_t timerRCC(TIM_TypeDef *tim);
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@ -6,6 +6,29 @@
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*/
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#include "stm32f10x.h"
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#include "rcc.h"
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#include "timer.h"
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const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
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{ .TIMx = TIM1, .rcc = RCC_APB2(TIM1) },
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{ .TIMx = TIM2, .rcc = RCC_APB1(TIM2) },
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{ .TIMx = TIM3, .rcc = RCC_APB1(TIM3) },
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{ .TIMx = TIM4, .rcc = RCC_APB1(TIM4) },
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#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(STM32F10X_XL) || defined(STM32F10X_HD_VL)
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{ .TIMx = TIM5, .rcc = RCC_APB1(TIM5) },
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{ .TIMx = TIM6, .rcc = RCC_APB1(TIM6) },
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{ .TIMx = TIM7, .rcc = RCC_APB1(TIM7) },
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#endif
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#if defined(STM32F10X_XL) || defined(STM32F10X_HD_VL)
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{ .TIMx = TIM8, .rcc = RCC_APB1(TIM8) },
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{ .TIMx = TIM9, .rcc = RCC_APB2(TIM9) },
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{ .TIMx = TIM10, .rcc = RCC_APB2(TIM10) },
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{ .TIMx = TIM11, .rcc = RCC_APB2(TIM11) },
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{ .TIMx = TIM12, .rcc = RCC_APB1(TIM12) },
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{ .TIMx = TIM13, .rcc = RCC_APB1(TIM13) },
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{ .TIMx = TIM14, .rcc = RCC_APB1(TIM14) },
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#endif
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};
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/**
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* @brief Selects the TIM Output Compare Mode.
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@ -6,6 +6,22 @@
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*/
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#include "stm32f30x.h"
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#include "rcc.h"
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#include "timer.h"
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const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
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{ .TIMx = TIM1, .rcc = RCC_APB2(TIM1) },
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{ .TIMx = TIM2, .rcc = RCC_APB1(TIM2) },
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{ .TIMx = TIM3, .rcc = RCC_APB1(TIM3) },
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{ .TIMx = TIM4, .rcc = RCC_APB1(TIM4) },
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{ .TIMx = TIM6, .rcc = RCC_APB1(TIM6) },
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{ .TIMx = TIM7, .rcc = RCC_APB1(TIM7) },
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{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8) },
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{ .TIMx = TIM15, .rcc = RCC_APB2(TIM15) },
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{ .TIMx = TIM16, .rcc = RCC_APB2(TIM16) },
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{ .TIMx = TIM17, .rcc = RCC_APB2(TIM17) },
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};
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/**
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* @brief Selects the TIM Output Compare Mode.
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@ -6,6 +6,8 @@
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*/
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#include "stm32f4xx.h"
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#include "timer.h"
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#include "rcc.h"
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/**
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* @brief Selects the TIM Output Compare Mode.
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@ -32,6 +34,23 @@
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#define CCMR_Offset ((uint16_t)0x0018)
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const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
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{ .TIMx = TIM1, .rcc = RCC_APB2(TIM1) },
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{ .TIMx = TIM2, .rcc = RCC_APB1(TIM2) },
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{ .TIMx = TIM3, .rcc = RCC_APB1(TIM3) },
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{ .TIMx = TIM4, .rcc = RCC_APB1(TIM4) },
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{ .TIMx = TIM5, .rcc = RCC_APB1(TIM5) },
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{ .TIMx = TIM6, .rcc = RCC_APB1(TIM6) },
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{ .TIMx = TIM7, .rcc = RCC_APB1(TIM7) },
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{ .TIMx = TIM8, .rcc = RCC_APB2(TIM8) },
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{ .TIMx = TIM9, .rcc = RCC_APB2(TIM9) },
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{ .TIMx = TIM10, .rcc = RCC_APB2(TIM10) },
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{ .TIMx = TIM11, .rcc = RCC_APB2(TIM11) },
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{ .TIMx = TIM12, .rcc = RCC_APB1(TIM12) },
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{ .TIMx = TIM13, .rcc = RCC_APB1(TIM13) },
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{ .TIMx = TIM14, .rcc = RCC_APB1(TIM14) },
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};
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void TIM_SelectOCxM_NoDisable(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
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{
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uint32_t tmp = 0;
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@ -65,3 +84,4 @@ void TIM_SelectOCxM_NoDisable(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t
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*(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8);
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}
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}
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@ -154,7 +154,3 @@
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15) | TIM_N(17) )
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM17)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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@ -203,5 +203,4 @@
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#define TARGET_IO_PORTD (BIT(2))
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#define USED_TIMERS ( TIM_N(1) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(8) )
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_TIM5 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8)
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@ -149,5 +149,3 @@
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#define TARGET_IO_PORTD (BIT(2))
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#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(8) | TIM_N(9))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM5 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM9)
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@ -138,6 +138,3 @@
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#define TARGET_IO_PORTC ( BIT(14) )
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) )
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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@ -133,7 +133,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(8) | TIM_N(15) | TIM_N(16) | TIM_N(17))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOF)
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@ -69,7 +69,3 @@
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#define TARGET_IO_PORTC (BIT(13)|BIT(14)|BIT(15))
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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@ -180,7 +180,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOC)
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@ -190,7 +190,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(15))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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@ -127,6 +127,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(16) |TIM_N(17))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(8) | TIM_N(9))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM9)
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(15) | TIM_N(16) |TIM_N(17))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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#define TARGET_IO_PORTF (BIT(4))
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(8) | TIM_N(15) | TIM_N(16) | TIM_N(17))
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM17 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM8)
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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@ -150,7 +150,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOC)
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15) | TIM_N(17))
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM17)
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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#define TARGET_IO_PORTB 0xffff
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#define TARGET_IO_PORTC ( BIT(13) | BIT(14) | BIT(15) )
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) )
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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@ -111,7 +111,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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@ -167,7 +167,3 @@
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#define TARGET_IO_PORTF (BIT(0)|BIT(1)|BIT(3)|BIT(4))
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15) | TIM_N(17))
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM17)
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
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#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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@ -143,6 +143,4 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB)
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@ -134,7 +134,3 @@
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#define TARGET_IO_PORTD 0xffff
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#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(12) | TIM_N(8) | TIM_N(9))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM5 | RCC_APB1Periph_TIM12 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_GPIOC)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM9)
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@ -120,5 +120,3 @@
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) )
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4 | RCC_APB1Periph_TIM5 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1)
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@ -156,8 +156,3 @@
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#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(15) | TIM_N(16) |TIM_N(17))
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#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
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||||
|
|
|
@ -136,7 +136,3 @@
|
|||
|
||||
#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15) | TIM_N(16) |TIM_N(17))
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
|
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#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
|
||||
|
||||
|
|
|
@ -171,7 +171,4 @@
|
|||
|
||||
#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(15) | TIM_N(17))
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
|
||||
#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
|
||||
|
||||
|
|
|
@ -165,7 +165,4 @@
|
|||
|
||||
#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(15) | TIM_N(16) | TIM_N(17) )
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
|
||||
#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
|
||||
|
||||
|
|
|
@ -202,7 +202,3 @@
|
|||
|
||||
#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(8) | TIM_N(15))
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3)
|
||||
#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM15)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
|
||||
|
||||
|
|
|
@ -215,7 +215,3 @@
|
|||
#define TARGET_IO_PORTF (BIT(0)|BIT(1)|BIT(4))
|
||||
|
||||
#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(15) | TIM_N(16) |TIM_N(17))
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
|
||||
#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM15 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB)
|
||||
|
|
|
@ -153,7 +153,3 @@
|
|||
|
||||
#define USED_TIMERS (TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(8) | TIM_N(16) | TIM_N(17))
|
||||
|
||||
#define TIMER_APB1_PERIPHERALS (RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM4)
|
||||
#define TIMER_APB2_PERIPHERALS (RCC_APB2Periph_TIM1 | RCC_APB2Periph_TIM8 | RCC_APB2Periph_TIM16 | RCC_APB2Periph_TIM17)
|
||||
#define TIMER_AHB_PERIPHERALS (RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOD)
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue