* Adding common source location in ./src/platform
To enable the continued clean up of multiple files still in ./src/main/driver (more PRs to follow) that are specifically for AT32, APM32 and STM32
Source will be moved to MCU_COMMON_SRC where it is specifically for that MCU (or variant). The test will be to ensure no files in the MCU_EXCLUDES for SITL.
* Use of +=
* Add APM32F4 driver libraries and USB middleware
* Add the APM32F405 and APM32F407 target files
* Add APM32 startup files
* Add APM32F4 linker files
* Add APM32F4.mk
* Add APM32 driver files
* Add APM32F40X MCU type
* Sync with the Betaflight master branch and modify the driver directory structure
* Implement CLI on the APM32
* Implement ADC on the APM32
* Implement config streamer on the APM32
* Implement I2C on the APM32
* Implement SPI on the APM32
* Implement DSHOT on the APM32
* Implement transponder ir on the APM32
* Implement serial uart on the APM32
* Implement MCO on the APM32
* Implement DWT on the APM32
* Update the init.c file, adding APM32 MCO configuration
* Remove all duplicated APM32 driver files and retaining only the APM32 LIB directory
* Create APM32F4.mk
* Add linker files for APM32F405 and APM32F407
* Add startup and library config files for APM32F405 and APM32F407
* Add target files for APM32F405 and APM32F407
* Add apm32 MCU driver files
* Add build configuration for APM32 MCU
* Implement config streamer on APM32
* Implement CLI on the APM32
* Implement ADC on the APM32
* Implement RCC on the APM32
* Implement MCO on the APM32
* Implement I2C on the APM32
* Implement SPI on the APM32
* Implement serial uart on the APM32
* Implement IO on the APM32
* Implement DMA on the APM32
* Implement DSHOT on the APM32
* Implement transponder ir on the APM32
* Update init.c
* Add the inclusion of the 'platform.h' file to the APM USB driver source file
* Merge bus SPI duplicate code from APM32 to STM32
* Update timer_apm32.c
* Merge motor duplicate code from APM32 to STM32
* Merge serial uart duplicate code from APM32 to STM32
* Update APM32F4.mk
* Update cli.c
* Update APM32F4.mk
* Remove the apm32_flash_f4_split.ld
* Associate the apm32 linker file with stm32_flash_f4_split.ld
* STM32H730/STM32H750 - Fix use of USE_LP_UART1 instead of USE_LPUART1.
* STM32H723 - Prepare for being able to build for using non-internal-flash
config storage.
* STM32H723 - Prepare for using non-default strings.
* STM32H723 - Disable 'use custom defaults' when using USE_EXST.
* STM32H723 - Disable CUSTOM_DEFAULTS_EXTENDED when EXST is used.
* OCTOSPI - Add initialisation code.
* Add support for RAM_CODE.
* STM32H730 - Add support for RAM_CODE via the .ram_code attribute.
* OCTOSPI - Proof-of-concept for disabling/enabling memory mapped mode on
a running system.
NOTE: The HAL libs are compiled into a memory mapped region, and this cannot be used for OctoSPI access when memory mapped mode is disabled.
* OCTOSPI - Drop HAL support after determining that it's not suitable for
the memory mapped flash use-case.
* OCTOSPI - Sometimes, when disabling memory map mode, the abort fails.
Handle this by disabling the OSPI peripheral first and re-enabling it
afterwards.
* SD/FLASH - Update comments regarding possible solutions to the catch-22
issue with SD/SPI/QUADSPI/OCTOSPI pin configurations.
* OCTOSPI - Use device instance directly.
* OCTOSPI - Prepare W25Q flash driver for octospi support.
* OCTOSPI - Add octospi flash detection.
Note: The method to detect flash chips is similar to the method used for
QUADSPI and as such the code was used as a base. However the initial
OCTOSPI implementation doesn't support the non-memory-mapped use-case so
the un-tested code is gated with `USE_OCTOSPI_EXPERIMENTAL`.
The key differences are:
* uses octospi api not quadspi api.
* flash chip clock speeds should not be changed for memory-mapped flash
chips, bootloader already set it correctly.
* only certain flash chips are capable of memory mapped support.
* W25Q - Ensure w25q128fv_readRegister returns 0 if the receive fails.
* OCTOSPI - Implement octoSpiTransmit1LINE, octoSpiReceive1LINE and
octoSpiReceive4LINES.
* OCTOSPI - Specify device from init.
* OCTOSPI - More fixes and work on init.
Current status is that memory mapped mode is disabled and flash chip is
detected, but w25q128fv_detect should not be calling w25q128fv_reset.
* FLASH - Add comment regarding wasted flash space on targets that only
use one bus type for the flash chip.
* FLASH - Split `detect` into `identify` and `configure`.
* OCTOSPI - Extract flashMemoryMappedModeEnable/Disable to separate
methods.
* FLASH - Reduce size of targets that don't support the use of multiple
flash interfaces.
* Single-flash-chip targets usually only support one type of io
interface.
* Without this, compiler warnings are generated in `flashSpiInit` for
targets that only use flash chip drivers that support quadspi or octospi
that don't even use SPI for flash.
* FLASH - Use MMFLASH_CODE/DATA to conditionally move code/data to RAM.
Only targets compiled to support memory mapped flash chips need the some
specific code in RAM. Otherwise the code/data should be in the normal
linker section.
* FLASH - W25Q Prepare for memory mapped flash usage.
* Wait/Delay functions must work with interrupts disabled.
* Code used for reading/writing must run from RAM.
* OCTOSPI - Implement remaining required methods.
* OCTOSPI - Fixes for earlier code (not last commit).
* FLASH - W25Q update timeout values from Datasheet Rev L.
* FLASH - Prepare flash driver for use when memory mapped flash is
disabled.
* System - Prepare microsISR for use when memory mapped flash is disabled.
* FLASH - Add support for CONFIG_IN_MEMORY_MAPPED_FLASH.
* Flash - Fix incorrect gating on cli flash commands.
When compiling with USE_FLASH_CHIP and without USE_FLASHFS there were
compiler warnings.
* MMFLASH - Fix release-mode build.
* FLASH - Allow SPI pins to be reconfigured when using CONFIG_IN_MEMORY_MAPPED_FLASH.
MMFLASH only works via QuadSPI/OctoSPI peripherals.
* EXST - Disable the 2GB workaround which is now causing a different
error.
The error we get with 'remove-section' enabled is:
"error in private header data: sorry, cannot handle this file". The
cause of this new error in the objcopy codebase is an out of memory
condition, somehow the 2GB files and this error are related but the root
cause of both is still unknown.
* OCTOSPI - Add support for STM32H723.
* STM32H723 - Add linker scripts for EXST usage.
* NucleoH723ZG - Add build script to demonstrate OCTOSPI and Memory Mapped
flash support.
* FLASH - WUse the size in bits to set the size of the buffer.
* FLASH - Fix typo in W25N driver defines.
Was using W28N instead of W25N
* OCTOSPI - Fix missing semilcolon when compiling without
USE_FLASH_MEMORY_MAPPED.
* OCTPSPI - Fix missing call to 'memoryMappedModeInit'.
* SPRacingH7RF - Add example build script to allow for testing prior to
unified target / cloud-build support.
* AT32F435: new target (#12159)
* AT32F435: New target (WIP)
* IO and Timer Updates
* Adding pseudonyms for the STM TypeDef items.
- implementation to follow
* Adding config_streamer support for AT32
* Implementation for IO
* Adding in Peripheral mapping from emsr.
* Warnings cleanup for AT drivers
* Getting things to the linking stage
* Add AT-START-F435 LEDs as default in AT32F435 as a temporary measure to aid bringup
* Remove tabs
* Enable selection of serial port to use for MSP
* Setup defaults for AT-START-F435 to use MSP on UART1
* Fix for most recent 4.5.0 Makefile changes
* Solve for sanity check.
* Add AT32F435 MCU type
* Fix compilation issue with SITL
* Merge conflict resolution
* Minor cleanup
* Adding line feed.
---------
Co-authored-by: Steve Evans <Steve@SCEvans.com>
Call targetConfiguration() once before config is loaded and again afterwards in case the config needs to be changed to load from SD card etc
Drop SPI clock during binding
Remove debug
Add per device SPI DMA enable
Fix sdioPinConfigure() declaration warning
Reduce clock speed during SPI RX initialisation
It turns out that two calls to micros() and the calculation of
directionChangeDurationUs took 581 cycles, vs 396 cycles without the
calls to micros() and deferred calculation of the duration which is only
needed in the CLI.
This brings the time down from around 7 microseconds to 5.5 microseconds
on an F3 at 72Mhz.
This makes the difference between 100% invalid telemetry and 4% invalid
telemetry on the first motor on the F3.
Squashed commits:
* Remove the forward declaration for `pwmDshotSetDirectionInput` and make
it static.
* Remove unneeded forward declaration of `motor_DMA_IRQHandler`.
* Remove duplication in DMA IRQ Handler.
Doesn't affect resulting code but improves readability.
* Use an inline function to read DWT->CYCCNT.
* Remove unneeded forward declarations from cli.c now that the correct
header is included.
* Update DWT unlock method.
Current micros() may return past time when called from ISR or elevated BASEPRI context. This is because a call to the SysTick interrupt handler sysTick_Hanlder(), which is responsible for 1ms rollover is blocked in these contexts.
This PR introduces microsISR() that is guranteed to return correct time in these contexts. Legacy micros() was also modified to call microISR() in these contexts.
The microISR() uses SysTick's COUNTFLAG to detect a pending rollover and use it to compensate the return value on its own. Actual rollover to sysTickUptime variable is still handled in the sysTick_Hanlder().
Fixes the `Waiting for Data` problem in configurator when:
- Clicking on `Save and Reboot` button
- Clicking on `Flash Firmware` button
When the system reboots after programming the new firmware it still
needs a connect/disconnect cycle to work normal. This cannot be solved
since the bootloader is a fixed program in ROM.
Fix is for F1 targets and only tested on naze boards.
hardware failures by counting the number of long flashes.
Fix up sensor read API so that code that uses sensors can detect
malfunctions.
If a failure mode occurs in a debug mode the code reboots the system
rather than rebooting to the bootloader.