If CS is asserted between transfers then consider bus to be busy for all but owning device (#12604)
* If CS is asserted between transfers then consider bus to be busy for all but owning device
* Track if MAX7456 is mid DMA transfer, not simply that the SPI bus is busy
* Enable SPI DMA TX/RX together
Co-authored-by: Steve Evans <SteveCEvans@users.noreply.github.com>
* SPI - Mark the SPI IRQ handler as FAST_IRQ_HANDLER.
Since it's used by both the gyro code, at 8k (or 2x8k on dual gyro
boards) having it in RAM removes a significant amount of potential flash
latency.
It is also used by the ELRS SPI code. The ELRS code runs at 500hz, but
each cycle uses multiple SPI transfers, for clear irq, read,
start-recieving, change-frequency, etc. I.e. invokd at least 1000hz in
addition to gyro reads.
* ELRS - Move some frequently used functions to RAM and mark some irq
handlers as FAST.
* SPI/LL - Move some frequently called code to FAST_CODE.
Also remove some invalid characters that Eclipse with encoding as UTF-8
complained about.
* SPI - Mark the spiRx and spiTx dma handlers as FAST_IRQ_HANDLER.
* Filter - move nullFilterApply out of FAST_CODE.
Since it doesn't do anything, it doesn't need to be fast. Instead we
keep more `fast` RAM for other code that really benefits from being in
fast RAM.
There is a slight penalty to jump into slower RAM.
* Gyro - Move `performGyroCalibration`out of 'fast' ram.
On F7X2 it was being inlined, saved 478 bytes of ITCM.
* Prevent handling of crash recovery handling, not detection of crash
recovery, from being inlined to save ITCM for code that runs more
frequently.
Call targetConfiguration() once before config is loaded and again afterwards in case the config needs to be changed to load from SD card etc
Drop SPI clock during binding
Remove debug
Add per device SPI DMA enable
Fix sdioPinConfigure() declaration warning
Reduce clock speed during SPI RX initialisation
