mirror of
https://github.com/betaflight/betaflight.git
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196 lines
6.9 KiB
C
196 lines
6.9 KiB
C
/*
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* This file is part of Betaflight.
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*
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* Betaflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Betaflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Betaflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <math.h>
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#include "platform.h"
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#include "io.h"
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#include "timer.h"
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#include "timer_stm32f4xx.h"
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#include "pwm_output.h"
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#include "nvic.h"
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#include "dma.h"
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#include "system.h"
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#include "rcc.h"
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#ifdef USE_DSHOT
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static uint8_t dmaMotorTimerCount = 0;
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static motorDmaTimer_t dmaMotorTimers[MAX_DMA_TIMERS];
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static motorDmaOutput_t dmaMotors[MAX_SUPPORTED_MOTORS];
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motorDmaOutput_t *getMotorDmaOutput(uint8_t index)
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{
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return &dmaMotors[index];
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}
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uint8_t getTimerIndex(TIM_TypeDef *timer)
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{
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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if (dmaMotorTimers[i].timer == timer) {
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return i;
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}
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}
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dmaMotorTimers[dmaMotorTimerCount++].timer = timer;
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return dmaMotorTimerCount-1;
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}
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void pwmWriteDigital(uint8_t index, uint16_t value)
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{
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if (!pwmMotorsEnabled) {
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return;
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}
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motorDmaOutput_t * const motor = &dmaMotors[index];
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if (!motor->timerHardware || !motor->timerHardware->dmaStream) {
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return;
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}
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uint16_t packet = (value << 1) | (motor->requestTelemetry ? 1 : 0);
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motor->requestTelemetry = false; // reset telemetry request to make sure it's triggered only once in a row
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// compute checksum
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int csum = 0;
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int csum_data = packet;
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for (int i = 0; i < 3; i++) {
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csum ^= csum_data; // xor data by nibbles
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csum_data >>= 4;
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}
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csum &= 0xf;
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// append checksum
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packet = (packet << 4) | csum;
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// generate pulses for whole packet
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for (int i = 0; i < 16; i++) {
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motor->dmaBuffer[i] = (packet & 0x8000) ? MOTOR_BIT_1 : MOTOR_BIT_0; // MSB first
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packet <<= 1;
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}
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TIM_DMACmd(motor->timerHardware->tim, motor->timerDmaSource, DISABLE);
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DMA_SetCurrDataCounter(motor->timerHardware->dmaStream, MOTOR_DMA_BUFFER_SIZE);
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DMA_CLEAR_FLAG(motor->dmaDescriptor, DMA_IT_TCIF);
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DMA_Cmd(motor->timerHardware->dmaStream, ENABLE);
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}
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void pwmCompleteDigitalMotorUpdate(uint8_t motorCount)
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{
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UNUSED(motorCount);
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if (!pwmMotorsEnabled) {
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return;
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}
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for (int i = 0; i < dmaMotorTimerCount; i++) {
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TIM_SetCounter(dmaMotorTimers[i].timer, 0);
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TIM_DMACmd(dmaMotorTimers[i].timer, dmaMotorTimers[i].timerDmaSources, ENABLE);
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}
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}
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void pwmDigitalMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t motorIndex, motorPwmProtocolTypes_e pwmProtocolType)
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{
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TIM_OCInitTypeDef TIM_OCInitStructure;
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DMA_InitTypeDef DMA_InitStructure;
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motorDmaOutput_t * const motor = &dmaMotors[motorIndex];
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motor->timerHardware = timerHardware;
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TIM_TypeDef *timer = timerHardware->tim;
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const IO_t motorIO = IOGetByTag(timerHardware->tag);
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const uint8_t timerIndex = getTimerIndex(timer);
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const bool configureTimer = (timerIndex == dmaMotorTimerCount-1);
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IOInit(motorIO, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
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IOConfigGPIOAF(motorIO, IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP), timerHardware->alternateFunction);
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if (configureTimer) {
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
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RCC_ClockCmd(timerRCC(timer), ENABLE);
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TIM_Cmd(timer, DISABLE);
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TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock / timerClockDivisor(timer) / getDshotHz(pwmProtocolType)) - 1;
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TIM_TimeBaseStructure.TIM_Period = MOTOR_BITLENGTH;
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TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(timer, &TIM_TimeBaseStructure);
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}
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TIM_OCStructInit(&TIM_OCInitStructure);
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
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if (timerHardware->output & TIMER_OUTPUT_N_CHANNEL) {
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TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
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TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Reset;
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TIM_OCInitStructure.TIM_OCNPolarity = (timerHardware->output & TIMER_OUTPUT_INVERTED) ? TIM_OCNPolarity_High : TIM_OCNPolarity_Low;
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} else {
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
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TIM_OCInitStructure.TIM_OCPolarity = (timerHardware->output & TIMER_OUTPUT_INVERTED) ? TIM_OCPolarity_Low : TIM_OCPolarity_High;
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}
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TIM_OCInitStructure.TIM_Pulse = 0;
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timerOCInit(timer, timerHardware->channel, &TIM_OCInitStructure);
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timerOCPreloadConfig(timer, timerHardware->channel, TIM_OCPreload_Enable);
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motor->timerDmaSource = timerDmaSource(timerHardware->channel);
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dmaMotorTimers[timerIndex].timerDmaSources |= motor->timerDmaSource;
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TIM_CCxCmd(timer, motor->timerHardware->channel, TIM_CCx_Enable);
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if (configureTimer) {
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TIM_CtrlPWMOutputs(timer, ENABLE);
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TIM_ARRPreloadConfig(timer, ENABLE);
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TIM_Cmd(timer, ENABLE);
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}
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DMA_Stream_TypeDef *stream = timerHardware->dmaStream;
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if (stream == NULL) {
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/* trying to use a non valid stream */
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return;
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}
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dmaInit(timerHardware->dmaIrqHandler, OWNER_MOTOR, RESOURCE_INDEX(motorIndex));
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motor->dmaDescriptor = getDmaDescriptor(stream);
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DMA_Cmd(stream, DISABLE);
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DMA_DeInit(stream);
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DMA_StructInit(&DMA_InitStructure);
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DMA_InitStructure.DMA_Channel = timerHardware->dmaChannel;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)timerChCCR(timerHardware);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)motor->dmaBuffer;
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = MOTOR_DMA_BUFFER_SIZE;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(stream, &DMA_InitStructure);
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}
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#endif
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