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Dominic Clifton a325e2386d STM32H730 - Initial ST32H730 support.
The H730 is a value-line CPU, similar to the H723/H725, but with only
128kb RAM.

The FC firmware code is designed to RUN from external flash in MEMORY
MAPPED mode, via OctoSPI.  Use of ITCM/DTCM advised for core loops, like
PID control.

A bootloader is required to enable memory-mapped mode and jump to the
firmware, similar to how EXST bootloader system works.

Config storage is not part of this commit and is a problem when using a
single flash chip in memory mapped mode because the CPU can't run
read/write routines from the flash chip while writing to the flash chip.
Until flash read/write routines are updated the solution requires either
a second flash chip on an SPI interface, or the use of an SD card for
config storage.

Additional commits will support read/write of config to the code/data
storage flash chip to enable cheap and space efficient single-flash-chip
FC solutions.

Squashed commits:
STM32H730 - Workaround issue with 2GB `.elf` files being created.
STM32H730 - Reduce firmware size to 1MB.
STM32H730 - Add USB HS configuration.
STM32H730 - Add ADC internal tag mappings.
STM32H730 - Update all ADC mappings based on the referenced ST
documentation.  Add the VBAT channels.
STM32H730 - Fix DMA continuous requests.
STM32H730 - Fix ADC_INTERNAL confusion.
STM32H730/G4 - Disambiguate use of ADC_CHANNEL_INTERNAL_FIRST_ID.
STM32H730 - Fix documentation reference.
STM32H730 - Add DMA request mapping for ADC3.
STM32H730 - Explicitly set the ADC clock.
STM32H730 - Configure PLL2 speeds correctly.

* Tested with Ultrafast 64GB SanDisk SDXC card.

STM32H730 - Use 50Mhz clock for SDXC cards.

* Tested with SanDisk Ultra 64GB.  100Mhz clock gave CRC errors.

STM32H730 - Ensure USB has a lower NVIC priority than the SDMMC card
reads.

If it's higher, 0, then the SDMMC's DMA IRQ handler doesn't get called
when handing USB MSC storage reads.

STM32H730 - Support CPU name in CLI.

STM32H730 - Rebuild when linker scripts changes.
2021-12-23 15:02:23 +01:00
..
stm32_flash.ld F3 - Add support for code in CCM RAM. 2019-09-02 18:40:13 +02:00
stm32_flash_f4_split.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f7_split.ld Fix pg_resetdata location in FLASH 2021-08-30 20:12:42 +01:00
stm32_flash_f74x.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f103_64k.ld moved the linker files to the src directory head 2019-04-28 16:04:44 +10:00
stm32_flash_f103_128k.ld [F1] Maintenance to keep F1 buildable 2020-03-23 10:30:33 +09:00
stm32_flash_f103_128k_opbl.ld moved the linker files to the src directory head 2019-04-28 16:04:44 +10:00
stm32_flash_f103_256k.ld moved the linker files to the src directory head 2019-04-28 16:04:44 +10:00
stm32_flash_f103_1024k.ld NUCLEOF103RG target 2019-09-23 23:58:03 +09:00
stm32_flash_f303_128k.ld moved the linker files to the src directory head 2019-04-28 16:04:44 +10:00
stm32_flash_f303_256k.ld moved the linker files to the src directory head 2019-04-28 16:04:44 +10:00
stm32_flash_f303_512k.ld Add Nucleo-F303RE support 2019-10-18 00:19:52 +09:00
stm32_flash_f405.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f405_opbl.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f411.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f411_opbl.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f446.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f722.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_f765.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_g4_split.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_g474.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_h7a3_2m.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_flash_h723_1m.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_flash_h743_2m.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_flash_h750_1m.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_flash_h750_128k.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_h730_common.ld STM32H730 - Initial ST32H730 support. 2021-12-23 15:02:23 +01:00
stm32_h730_common_post.ld STM32H730 - Initial ST32H730 support. 2021-12-23 15:02:23 +01:00
stm32_h750_common.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_h750_common_post.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00
stm32_ram_h730_exst.ld STM32H730 - Initial ST32H730 support. 2021-12-23 15:02:23 +01:00
stm32_ram_h730_exst_post.ld STM32H730 - Initial ST32H730 support. 2021-12-23 15:02:23 +01:00
stm32_ram_h743.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_ram_h750_exst.ld New SPI API supporting DMA 2021-07-25 12:40:25 +12:00
stm32_ram_h750_exst_post.ld Rearranged flash on targets >512 kB to keep first sector from overflowing. 2021-08-09 10:06:27 +12:00