mirror of
https://github.com/betaflight/betaflight.git
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194 lines
7.1 KiB
C
194 lines
7.1 KiB
C
/*
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* This file is part of Betaflight.
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*
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* Betaflight is free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Betaflight is distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#ifdef APM32F4
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#include "apm32f4xx.h"
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#include "apm32f4xx_dal.h"
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#include "system_apm32f4xx.h"
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#include "apm32f4xx_ddl_spi.h"
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#include "apm32f4xx_ddl_gpio.h"
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#include "apm32f4xx_ddl_dma.h"
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#include "apm32f4xx_ddl_rcm.h"
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#include "apm32f4xx_ddl_bus.h"
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#include "apm32f4xx_ddl_tmr.h"
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#include "apm32f4xx_ddl_system.h"
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#include "apm32f4xx_ddl_adc.h"
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#include "apm32f4xx_ddl_ex.h"
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// Aliases
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#define HAL_StatusTypeDef DAL_StatusTypeDef
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#define HAL_RCC_GetSysClockFreq DAL_RCM_GetSysClockFreq
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#define HAL_IncTick DAL_IncTick
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#define HAL_TIM_IC_Start_IT DAL_TMR_IC_Start_IT
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#define HAL_TIM_IC_ConfigChannel DAL_TMR_IC_ConfigChannel
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#define HAL_NVIC_SetPriority DAL_NVIC_SetPriority
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#define HAL_NVIC_EnableIRQ DAL_NVIC_EnableIRQ
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#define __HAL_TIM_GetAutoreload __DAL_TMR_GET_AUTORELOAD
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#define __HAL_TIM_SetCounter __DAL_TMR_SET_COUNTER
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#define __HAL_DMA_GET_COUNTER __DAL_DMA_GET_COUNTER
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#define __HAL_UART_ENABLE_IT __DAL_UART_ENABLE_IT
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#define LL_TIM_InitTypeDef DDL_TMR_InitTypeDef
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#define LL_TIM_DeInit DDL_TMR_DeInit
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#define LL_TIM_OC_InitTypeDef DDL_TMR_OC_InitTypeDef
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#define LL_TIM_IC_InitTypeDef DDL_TMR_IC_InitTypeDef
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#define LL_TIM_SetAutoReload DDL_TMR_SetAutoReload
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#define LL_TIM_DisableIT_UPDATE DDL_TMR_DisableIT_UPDATE
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#define LL_TIM_DisableCounter DDL_TMR_DisableCounter
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#define LL_TIM_SetCounter DDL_TMR_SetCounter
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#define LL_TIM_ClearFlag_UPDATE DDL_TMR_ClearFlag_UPDATE
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#define LL_TIM_EnableIT_UPDATE DDL_TMR_EnableIT_UPDATE
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#define LL_TIM_EnableCounter DDL_TMR_EnableCounter
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#define LL_TIM_GenerateEvent_UPDATE DDL_TMR_GenerateEvent_UPDATE
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#define LL_EX_TIM_DisableIT DDL_EX_TMR_DisableIT
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#define LL_DMA_InitTypeDef DDL_DMA_InitTypeDef
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#define LL_EX_DMA_DeInit DDL_EX_DMA_DeInit
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#define LL_EX_DMA_Init DDL_EX_DMA_Init
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#define LL_EX_DMA_DisableResource DDL_EX_DMA_DisableResource
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#define LL_EX_DMA_EnableResource DDL_EX_DMA_EnableResource
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#define LL_EX_DMA_GetDataLength DDL_EX_DMA_GetDataLength
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#define LL_EX_DMA_SetDataLength DDL_EX_DMA_SetDataLength
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#define LL_EX_DMA_EnableIT_TC DDL_EX_DMA_EnableIT_TC
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#define TIM_TypeDef TMR_TypeDef
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#define TIM_HandleTypeDef TMR_HandleTypeDef
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#define TIM_ICPOLARITY_RISING TMR_ICPOLARITY_RISING
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#define TIM_CCxChannelCmd TMR_CCxChannelCmd
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#define TIM_CCx_DISABLE TMR_CCx_DISABLE
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#define TIM_CCx_ENABLE TMR_CCx_ENABLE
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#define TIM_CCxChannelCmd TMR_CCxChannelCmd
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#define TIM_IC_InitTypeDef TMR_IC_InitTypeDef
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#define TIM_ICPOLARITY_FALLING TMR_ICPOLARITY_FALLING
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#define TIM_ICSELECTION_DIRECTTI TMR_ICSELECTION_DIRECTTI
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#define TIM_ICPSC_DIV1 TMR_ICPSC_DIV1
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#ifdef USE_DAL_DRIVER
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#define USE_HAL_DRIVER
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#endif
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#ifdef USE_FULL_DDL_DRIVER
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#define USE_FULL_LL_DRIVER
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#endif
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#endif // APM32F4
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#if defined(APM32F405xx) || defined(APM32F407xx) || defined(APM32F415xx) || defined(APM32F417xx)
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#define USE_FAST_DATA
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// Chip Unique ID on APM32F405
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#define U_ID_0 (*(uint32_t*)0x1fff7a10)
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#define U_ID_1 (*(uint32_t*)0x1fff7a14)
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#define U_ID_2 (*(uint32_t*)0x1fff7a18)
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#define USE_PIN_AF
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#ifndef APM32F4
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#define APM32F4
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#endif
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#endif
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#define USE_RPM_FILTER
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#define USE_DYN_IDLE
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#define USE_DYN_NOTCH_FILTER
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#define USE_ADC_INTERNAL
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#define USE_USB_MSC
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#define USE_PERSISTENT_MSC_RTC
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#define USE_MCO
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#define USE_DMA_SPEC
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#define USE_PERSISTENT_OBJECTS
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#define USE_LATE_TASK_STATISTICS
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#define USE_OVERCLOCK
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#define TASK_GYROPID_DESIRED_PERIOD 125 // 125us = 8kHz
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#define SCHEDULER_DELAY_LIMIT 10
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#define DEFAULT_CPU_OVERCLOCK 0
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#define FAST_IRQ_HANDLER
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#define DMA_DATA_ZERO_INIT
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#define DMA_DATA
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#define STATIC_DMA_DATA_AUTO static
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// Data in RAM which is guaranteed to not be reset on hot reboot
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#define PERSISTENT __attribute__ ((section(".persistent_data"), aligned(4)))
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#define DMA_RAM
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#define DMA_RW_AXI
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#define DMA_RAM_R
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#define DMA_RAM_W
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#define DMA_RAM_RW
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#define USE_TIMER_MGMT
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#define USE_TIMER_AF
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#if defined(APM32F4)
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//speed is packed inside modebits 5 and 2,
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#define IO_CONFIG(mode, speed, pupd) ((mode) | ((speed) << 2) | ((pupd) << 5))
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#define IOCFG_OUT_PP IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
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#define IOCFG_OUT_PP_UP IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_LOW, GPIO_PULLUP)
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#define IOCFG_OUT_PP_25 IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_HIGH, GPIO_NOPULL)
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#define IOCFG_OUT_OD IO_CONFIG(GPIO_MODE_OUTPUT_OD, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
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#define IOCFG_AF_PP IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
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#define IOCFG_AF_PP_PD IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_PULLDOWN)
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#define IOCFG_AF_PP_UP IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_LOW, GPIO_PULLUP)
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#define IOCFG_AF_OD IO_CONFIG(GPIO_MODE_AF_OD, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
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#define IOCFG_IPD IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_PULLDOWN)
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#define IOCFG_IPU IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_PULLUP)
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#define IOCFG_IN_FLOATING IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_LOW, GPIO_NOPULL)
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#define IOCFG_IPU_25 IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_HIGH, GPIO_PULLUP)
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#define IO_CONFIG_GET_MODE(cfg) (((cfg) >> 0) & 0x03)
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#define IO_CONFIG_GET_SPEED(cfg) (((cfg) >> 2) & 0x03)
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#define IO_CONFIG_GET_OTYPE(cfg) (((cfg) >> 4) & 0x01)
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#define IO_CONFIG_GET_PULL(cfg) (((cfg) >> 5) & 0x03)
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#define SPI_IO_AF_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define SPI_IO_AF_SCK_CFG_HIGH IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPI_IO_AF_SCK_CFG_LOW IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN)
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#define SPI_IO_AF_SDI_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPI_IO_CS_CFG IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
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#define SPI_IO_CS_HIGH_CFG IO_CONFIG(GPIO_MODE_INPUT, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
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#define SPIDEV_COUNT 3
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#define CHECK_SPI_RX_DATA_AVAILABLE(instance) LL_SPI_IsActiveFlag_RXNE(instance)
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#define SPI_RX_DATA_REGISTER(base) ((base)->DR)
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#define MAX_SPI_PIN_SEL 2
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#define USE_TX_IRQ_HANDLER
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#endif
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#if defined(APM32F4)
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#define FLASH_CONFIG_BUFFER_TYPE uint32_t
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#endif
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