mirror of
https://github.com/betaflight/betaflight.git
synced 2025-07-16 12:55:19 +03:00
Removing Timer Usage Flags (#12862)
This commit is contained in:
J Blackman
GitHub
parent
d8a9906e92
commit
7d7b6596b0
12 changed files with 419 additions and 463 deletions
|
|
@ -60,129 +60,129 @@ const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
|
|||
const timerHardware_t fullTimerHardware[FULL_TIMER_CHANNEL_COUNT] = {
|
||||
// Auto-generated from 'timer_def.h'
|
||||
//PORTA
|
||||
DEF_TIM(TIM2, CH1, PA0, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH2, PA1, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH1, PA5, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PA7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH2, PA9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH3, PA10, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PA11, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH1, PA15, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH1, PA0, 0, 0),
|
||||
DEF_TIM(TIM2, CH2, PA1, 0, 0),
|
||||
DEF_TIM(TIM2, CH3, PA2, 0, 0),
|
||||
DEF_TIM(TIM2, CH4, PA3, 0, 0),
|
||||
DEF_TIM(TIM2, CH1, PA5, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PA7, 0, 0),
|
||||
DEF_TIM(TIM1, CH1, PA8, 0, 0),
|
||||
DEF_TIM(TIM1, CH2, PA9, 0, 0),
|
||||
DEF_TIM(TIM1, CH3, PA10, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PA11, 0, 0),
|
||||
DEF_TIM(TIM2, CH1, PA15, 0, 0),
|
||||
|
||||
DEF_TIM(TIM5, CH1, PA0, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM5, CH3, PA2, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM5, CH4, PA3, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH1, PA6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PA7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM5, CH1, PA0, 0, 0),
|
||||
DEF_TIM(TIM5, CH2, PA1, 0, 0),
|
||||
DEF_TIM(TIM5, CH3, PA2, 0, 0),
|
||||
DEF_TIM(TIM5, CH4, PA3, 0, 0),
|
||||
DEF_TIM(TIM3, CH1, PA6, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PA7, 0, 0),
|
||||
|
||||
DEF_TIM(TIM9, CH1, PA2, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM9, CH2, PA3, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM9, CH1, PA2, 0, 0),
|
||||
DEF_TIM(TIM9, CH2, PA3, 0, 0),
|
||||
#if !defined(STM32F411xE)
|
||||
DEF_TIM(TIM8, CH1N, PA5, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH1N, PA7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH1N, PA5, 0, 0),
|
||||
DEF_TIM(TIM8, CH1N, PA7, 0, 0),
|
||||
|
||||
DEF_TIM(TIM13, CH1, PA6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM14, CH1, PA7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM13, CH1, PA6, 0, 0),
|
||||
DEF_TIM(TIM14, CH1, PA7, 0, 0),
|
||||
#endif
|
||||
|
||||
//PORTB
|
||||
DEF_TIM(TIM1, CH2N, PB0, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PB1, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH2, PB3, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH3, PB10, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM2, CH4, PB11, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PB13, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH2N, PB14, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PB15, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH2N, PB0, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PB1, 0, 0),
|
||||
DEF_TIM(TIM2, CH2, PB3, 0, 0),
|
||||
DEF_TIM(TIM2, CH3, PB10, 0, 0),
|
||||
DEF_TIM(TIM2, CH4, PB11, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PB13, 0, 0),
|
||||
DEF_TIM(TIM1, CH2N, PB14, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PB15, 0, 0),
|
||||
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH1, PB4, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PB5, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH1, PB6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH2, PB7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH3, PB8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH3, PB0, 0, 0),
|
||||
DEF_TIM(TIM3, CH4, PB1, 0, 0),
|
||||
DEF_TIM(TIM3, CH1, PB4, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PB5, 0, 0),
|
||||
DEF_TIM(TIM4, CH1, PB6, 0, 0),
|
||||
DEF_TIM(TIM4, CH2, PB7, 0, 0),
|
||||
DEF_TIM(TIM4, CH3, PB8, 0, 0),
|
||||
DEF_TIM(TIM4, CH4, PB9, 0, 0),
|
||||
|
||||
#if !defined(STM32F411xE)
|
||||
DEF_TIM(TIM8, CH2N, PB0, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH3N, PB1, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH2N, PB0, 0, 0),
|
||||
DEF_TIM(TIM8, CH3N, PB1, 0, 0),
|
||||
#endif
|
||||
DEF_TIM(TIM10, CH1, PB8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM11, CH1, PB9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM10, CH1, PB8, 0, 0),
|
||||
DEF_TIM(TIM11, CH1, PB9, 0, 0),
|
||||
#if !defined(STM32F411xE)
|
||||
DEF_TIM(TIM8, CH2N, PB14, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH3N, PB15, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH2N, PB14, 0, 0),
|
||||
DEF_TIM(TIM8, CH3N, PB15, 0, 0),
|
||||
|
||||
DEF_TIM(TIM12, CH1, PB14, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM12, CH2, PB15, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM12, CH1, PB14, 0, 0),
|
||||
DEF_TIM(TIM12, CH2, PB15, 0, 0),
|
||||
#endif
|
||||
|
||||
//PORTC
|
||||
DEF_TIM(TIM3, CH1, PC6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PC7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH3, PC8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH4, PC9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM3, CH1, PC6, 0, 0),
|
||||
DEF_TIM(TIM3, CH2, PC7, 0, 0),
|
||||
DEF_TIM(TIM3, CH3, PC8, 0, 0),
|
||||
DEF_TIM(TIM3, CH4, PC9, 0, 0),
|
||||
|
||||
#if !defined(STM32F411xE)
|
||||
DEF_TIM(TIM8, CH1, PC6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH3, PC8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH4, PC9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM8, CH1, PC6, 0, 0),
|
||||
DEF_TIM(TIM8, CH2, PC7, 0, 0),
|
||||
DEF_TIM(TIM8, CH3, PC8, 0, 0),
|
||||
DEF_TIM(TIM8, CH4, PC9, 0, 0),
|
||||
#endif
|
||||
|
||||
//PORTD
|
||||
DEF_TIM(TIM4, CH1, PD12, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH2, PD13, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH3, PD14, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH4, PD15, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM4, CH1, PD12, 0, 0),
|
||||
DEF_TIM(TIM4, CH2, PD13, 0, 0),
|
||||
DEF_TIM(TIM4, CH3, PD14, 0, 0),
|
||||
DEF_TIM(TIM4, CH4, PD15, 0, 0),
|
||||
|
||||
//PORTE
|
||||
DEF_TIM(TIM1, CH1N, PE8, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1, PE9, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH2N, PE10, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH2, PE11, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PE12, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH3, PE13, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH4, PE14, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM1, CH1N, PE8, 0, 0),
|
||||
DEF_TIM(TIM1, CH1, PE9, 0, 0),
|
||||
DEF_TIM(TIM1, CH2N, PE10, 0, 0),
|
||||
DEF_TIM(TIM1, CH2, PE11, 0, 0),
|
||||
DEF_TIM(TIM1, CH3N, PE12, 0, 0),
|
||||
DEF_TIM(TIM1, CH3, PE13, 0, 0),
|
||||
DEF_TIM(TIM1, CH4, PE14, 0, 0),
|
||||
|
||||
DEF_TIM(TIM9, CH1, PE5, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM9, CH2, PE6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM9, CH1, PE5, 0, 0),
|
||||
DEF_TIM(TIM9, CH2, PE6, 0, 0),
|
||||
|
||||
//PORTF
|
||||
#if !defined(STM32F411xE)
|
||||
DEF_TIM(TIM10, CH1, PF6, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM11, CH1, PF7, TIM_USE_ANY, 0, 0),
|
||||
DEF_TIM(TIM10, CH1, PF6, 0, 0),
|
||||
DEF_TIM(TIM11, CH1, PF7, 0, 0),
|
||||
#endif
|
||||
|
||||
//PORTH
|
||||
// Port H is not available for LPQFP-100 or 144 package
|
||||
// DEF_TIM(TIM5, CH1, PH10, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM5, CH2, PH11, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM5, CH3, PH12, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM5, CH1, PH10, 0, 0),
|
||||
// DEF_TIM(TIM5, CH2, PH11, 0, 0),
|
||||
// DEF_TIM(TIM5, CH3, PH12, 0, 0),
|
||||
//
|
||||
//#if !defined(STM32F411xE)
|
||||
// DEF_TIM(TIM8, CH1N, PH13, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH2N, PH14, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH3N, PH15, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH1N, PH13, 0, 0),
|
||||
// DEF_TIM(TIM8, CH2N, PH14, 0, 0),
|
||||
// DEF_TIM(TIM8, CH3N, PH15, 0, 0),
|
||||
//
|
||||
// DEF_TIM(TIM12, CH1, PH6, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM12, CH2, PH9, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM12, CH1, PH6, 0, 0),
|
||||
// DEF_TIM(TIM12, CH2, PH9, 0, 0),
|
||||
//#endif
|
||||
|
||||
//PORTI
|
||||
// Port I is not available for LPQFP-100 or 144 package
|
||||
// DEF_TIM(TIM5, CH4, PI0, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM5, CH4, PI0, 0, 0),
|
||||
//
|
||||
//#if !defined(STM32F411xE)
|
||||
// DEF_TIM(TIM8, CH4, PI2, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH1, PI5, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH2, PI6, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH3, PI7, TIM_USE_ANY, 0, 0),
|
||||
// DEF_TIM(TIM8, CH4, PI2, 0, 0),
|
||||
// DEF_TIM(TIM8, CH1, PI5, 0, 0),
|
||||
// DEF_TIM(TIM8, CH2, PI6, 0, 0),
|
||||
// DEF_TIM(TIM8, CH3, PI7, 0, 0),
|
||||
//#endif
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue