* REFACTOR: moving timer definitions to MCU locations.
* Now that the MCU directory needs to be included in the search path for includes, no need for target.h entry if filenaming is consistent.
* SITL needs the empty include.
Remove USE_SWDIO, simply refer to debug
Command line of `make TARGET=STM32F405 DEBUG=GDB` will trigger this.
Alternative is simply `make TARGET=STM32F405 EXTRA_FLAGS="-DDEBUG"`
* Re-arranging VCP files in preparation for AT32
* Tab size 4
* Adding ADC driver for AT32F43x
* RCC code here is STM32 specific.
* Adding rcc.c for AT32
* pwm_output.c has very specific MCU coupling - to be re factored.
* Separating exti.c
* Split up io.c int stm32/io_stm32.c and at32/io_at32.c
* Adding in VCP files for AT32 and move timer
- note will require more cleanup
* Solving for sanity checks
* Inadvertent inclusion of timer.c for HAL
* rcc.c, timer.c and moving other spevific files out of the driver directory
* Adding I2C drivers
* Formatting
* ws2811 driver and usb_msc driver skeleton
* STM32H730/STM32H750 - Fix use of USE_LP_UART1 instead of USE_LPUART1.
* STM32H723 - Prepare for being able to build for using non-internal-flash
config storage.
* STM32H723 - Prepare for using non-default strings.
* STM32H723 - Disable 'use custom defaults' when using USE_EXST.
* STM32H723 - Disable CUSTOM_DEFAULTS_EXTENDED when EXST is used.
* OCTOSPI - Add initialisation code.
* Add support for RAM_CODE.
* STM32H730 - Add support for RAM_CODE via the .ram_code attribute.
* OCTOSPI - Proof-of-concept for disabling/enabling memory mapped mode on
a running system.
NOTE: The HAL libs are compiled into a memory mapped region, and this cannot be used for OctoSPI access when memory mapped mode is disabled.
* OCTOSPI - Drop HAL support after determining that it's not suitable for
the memory mapped flash use-case.
* OCTOSPI - Sometimes, when disabling memory map mode, the abort fails.
Handle this by disabling the OSPI peripheral first and re-enabling it
afterwards.
* SD/FLASH - Update comments regarding possible solutions to the catch-22
issue with SD/SPI/QUADSPI/OCTOSPI pin configurations.
* OCTOSPI - Use device instance directly.
* OCTOSPI - Prepare W25Q flash driver for octospi support.
* OCTOSPI - Add octospi flash detection.
Note: The method to detect flash chips is similar to the method used for
QUADSPI and as such the code was used as a base. However the initial
OCTOSPI implementation doesn't support the non-memory-mapped use-case so
the un-tested code is gated with `USE_OCTOSPI_EXPERIMENTAL`.
The key differences are:
* uses octospi api not quadspi api.
* flash chip clock speeds should not be changed for memory-mapped flash
chips, bootloader already set it correctly.
* only certain flash chips are capable of memory mapped support.
* W25Q - Ensure w25q128fv_readRegister returns 0 if the receive fails.
* OCTOSPI - Implement octoSpiTransmit1LINE, octoSpiReceive1LINE and
octoSpiReceive4LINES.
* OCTOSPI - Specify device from init.
* OCTOSPI - More fixes and work on init.
Current status is that memory mapped mode is disabled and flash chip is
detected, but w25q128fv_detect should not be calling w25q128fv_reset.
* FLASH - Add comment regarding wasted flash space on targets that only
use one bus type for the flash chip.
* FLASH - Split `detect` into `identify` and `configure`.
* OCTOSPI - Extract flashMemoryMappedModeEnable/Disable to separate
methods.
* FLASH - Reduce size of targets that don't support the use of multiple
flash interfaces.
* Single-flash-chip targets usually only support one type of io
interface.
* Without this, compiler warnings are generated in `flashSpiInit` for
targets that only use flash chip drivers that support quadspi or octospi
that don't even use SPI for flash.
* FLASH - Use MMFLASH_CODE/DATA to conditionally move code/data to RAM.
Only targets compiled to support memory mapped flash chips need the some
specific code in RAM. Otherwise the code/data should be in the normal
linker section.
* FLASH - W25Q Prepare for memory mapped flash usage.
* Wait/Delay functions must work with interrupts disabled.
* Code used for reading/writing must run from RAM.
* OCTOSPI - Implement remaining required methods.
* OCTOSPI - Fixes for earlier code (not last commit).
* FLASH - W25Q update timeout values from Datasheet Rev L.
* FLASH - Prepare flash driver for use when memory mapped flash is
disabled.
* System - Prepare microsISR for use when memory mapped flash is disabled.
* FLASH - Add support for CONFIG_IN_MEMORY_MAPPED_FLASH.
* Flash - Fix incorrect gating on cli flash commands.
When compiling with USE_FLASH_CHIP and without USE_FLASHFS there were
compiler warnings.
* MMFLASH - Fix release-mode build.
* FLASH - Allow SPI pins to be reconfigured when using CONFIG_IN_MEMORY_MAPPED_FLASH.
MMFLASH only works via QuadSPI/OctoSPI peripherals.
* EXST - Disable the 2GB workaround which is now causing a different
error.
The error we get with 'remove-section' enabled is:
"error in private header data: sorry, cannot handle this file". The
cause of this new error in the objcopy codebase is an out of memory
condition, somehow the 2GB files and this error are related but the root
cause of both is still unknown.
* OCTOSPI - Add support for STM32H723.
* STM32H723 - Add linker scripts for EXST usage.
* NucleoH723ZG - Add build script to demonstrate OCTOSPI and Memory Mapped
flash support.
* FLASH - WUse the size in bits to set the size of the buffer.
* FLASH - Fix typo in W25N driver defines.
Was using W28N instead of W25N
* OCTOSPI - Fix missing semilcolon when compiling without
USE_FLASH_MEMORY_MAPPED.
* OCTPSPI - Fix missing call to 'memoryMappedModeInit'.
* SPRacingH7RF - Add example build script to allow for testing prior to
unified target / cloud-build support.
* AT32F435: new target (#12159)
* AT32F435: New target (WIP)
* IO and Timer Updates
* Adding pseudonyms for the STM TypeDef items.
- implementation to follow
* Adding config_streamer support for AT32
* Implementation for IO
* Adding in Peripheral mapping from emsr.
* Warnings cleanup for AT drivers
* Getting things to the linking stage
* Add AT-START-F435 LEDs as default in AT32F435 as a temporary measure to aid bringup
* Remove tabs
* Enable selection of serial port to use for MSP
* Setup defaults for AT-START-F435 to use MSP on UART1
* Fix for most recent 4.5.0 Makefile changes
* Solve for sanity check.
* Add AT32F435 MCU type
* Fix compilation issue with SITL
* Merge conflict resolution
* Minor cleanup
* Adding line feed.
---------
Co-authored-by: Steve Evans <Steve@SCEvans.com>
* Cleanup Makefiles
Given the targets are now simply the MCU, there is now a significant amount of duplication.
TODO:
- will possibly add STM32.mk for inclusion from STM32F4 etc to remove further duplication.
Noting it is now imperative that the gating is right.
* Removed the remnants of "features"
* Further clean up in preparation of new MCUs
* Typo for STM32F722xx
* Fix F411
* Last remnants of the _TARGETS lists.
- Including ability to define custom defaults as char[] that is baked into the build
- removed unnecessary size of custom defaults header parsing (defines provided by build process or in board.h for devs).
- Updating cache for tool chain
- Using 10.3 as the build chain, due to bug in 11.2 -> https://bugs.linaro.org/show_bug.cgi?id=5825.
- No inlining to prevent over flow. Perhaps other calls represent better choices.
The H730 is a value-line CPU, similar to the H723/H725, but with only
128kb RAM.
The FC firmware code is designed to RUN from external flash in MEMORY
MAPPED mode, via OctoSPI. Use of ITCM/DTCM advised for core loops, like
PID control.
A bootloader is required to enable memory-mapped mode and jump to the
firmware, similar to how EXST bootloader system works.
Config storage is not part of this commit and is a problem when using a
single flash chip in memory mapped mode because the CPU can't run
read/write routines from the flash chip while writing to the flash chip.
Until flash read/write routines are updated the solution requires either
a second flash chip on an SPI interface, or the use of an SD card for
config storage.
Additional commits will support read/write of config to the code/data
storage flash chip to enable cheap and space efficient single-flash-chip
FC solutions.
Squashed commits:
STM32H730 - Workaround issue with 2GB `.elf` files being created.
STM32H730 - Reduce firmware size to 1MB.
STM32H730 - Add USB HS configuration.
STM32H730 - Add ADC internal tag mappings.
STM32H730 - Update all ADC mappings based on the referenced ST
documentation. Add the VBAT channels.
STM32H730 - Fix DMA continuous requests.
STM32H730 - Fix ADC_INTERNAL confusion.
STM32H730/G4 - Disambiguate use of ADC_CHANNEL_INTERNAL_FIRST_ID.
STM32H730 - Fix documentation reference.
STM32H730 - Add DMA request mapping for ADC3.
STM32H730 - Explicitly set the ADC clock.
STM32H730 - Configure PLL2 speeds correctly.
* Tested with Ultrafast 64GB SanDisk SDXC card.
STM32H730 - Use 50Mhz clock for SDXC cards.
* Tested with SanDisk Ultra 64GB. 100Mhz clock gave CRC errors.
STM32H730 - Ensure USB has a lower NVIC priority than the SDMMC card
reads.
If it's higher, 0, then the SDMMC's DMA IRQ handler doesn't get called
when handing USB MSC storage reads.
STM32H730 - Support CPU name in CLI.
STM32H730 - Rebuild when linker scripts changes.
Call targetConfiguration() once before config is loaded and again afterwards in case the config needs to be changed to load from SD card etc
Drop SPI clock during binding
Remove debug
Add per device SPI DMA enable
Fix sdioPinConfigure() declaration warning
Reduce clock speed during SPI RX initialisation
