* Enable QSPI flash chip drivers on NUCLEOH743 for some CI visibility.
* Rework QSPI flash detection.
* Supports chips that are in QSPI mode by default (factory).
* Supports chips that are in QSPI mode due to configuration (e.g. Quad
Enable in Non-Volatile on W25Q128FV)
* Supports chips that need 8 dummy bytes (e.g. W25Q128JV) and ones that
don't (e.g. W25N01G)
ICM42605 - Fix missing call to mpuDetect.
ICM42605 - Disable un-needed debug code by default.
ICM42605 - Delete unneeded reads of ICM42605_RA_GYRO_CONFIG0 and
ICM42605_RA_ACCEL_CONFIG0.
ICM42605 - rename the khzToSupportedODRMap and make it static.
Adds variations in GPS coordinate OSD element display:
1. Fractional degrees with 7 digits (default) - 000.0000000
2. Fractional degrees with 4 digits - 000.0000
3. Degrees, minutes, seconds - 000^00'00.0"E
4. Open Location Code (sometimed called Google Plus Code) - 23ABC4R8+M37
Uses Open Location Code library from:
https://github.com/google/open-location-code
Added support for `STATE(GPS_FIX_EVER)` to differentiate from having a fix now (`STATE(GPS_FIX)`) vs. ever having a fix.
Logic change to only display coordinates from the GPS module once a fix has been initially established. This prevents displaying interim coordinates supplied by the GPS while the fix is still being establised as these coordinates can be inaccurate by hundreds of miles. Once a fix is established initially then the coordinates will continue to be displayed even if the fix is lost or degrades in quality.
Add logic to "blink" the coordinates if the 3D fix is lost after initially being established. Alerts the user that the coordinate display may be inaccurate or no longer being updated. We want to keep the coordinates displayed to aid recovery if the user loses the fix (like crashing upside down).
Replace GPS defines `LAT` and `LON` used throughout the code with the enumeration:
```
typedef enum {
GPS_LATITUDE,
GPS_LONGITUDE
} gpsCoordinateType_e;
```
The Open Location Code option is bounded with `USE_GPS_PLUS_CODE` to allow it to be excluded if needed for targets with limited flash space. It currently fits for F411 but we may have to remove it in the future.
* UART9 was supported as LPUART on some H7s.
* Newer 100-pin H7 CPUs support UART9 and USART10.
* 100+ pin devices support higher numbered UARTS than UART10.
Use USE_LPUART instead of hacking into UART9 for clarity.
* LPUARTS are different from other types of UARTS.
* They need different ID ranges.
* They have and different capabilities.
* Renumber LPUART1 to 40.
0-19 reserved for UART1-20
40-49 onwards for LPUART instances.
It makes sense to treat them as a different class of UART. Just like we
do for softserial, vcp, etc.
